DA7212 datasheet(39/136 Pages) RENESAS

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DA7212

Ultra-Low Power Stereo Codec

Datasheet

Revision 3.5

05-Jan-2022

CFR0011-120-00

39 of 135

When CP_MCHANGE is set to 10 (tracking DAC signal size, described in Table 26) or

CP_MCHANGE is set to 11 (tracking the output signal size), the charge pump switches its supply

between the VDD_A rail and the VDD_A/2 rail depending on its power requirements.

When low output voltages are needed, the charge pump saves power by using the lower-voltage

VDD_A /2 rail.

The switching point between using the VDD_A rail and the VDD_A/2 rail is determined by the

CP_THRESH_VDD2 register setting. The switching points determined by CP_THRESH_VDD2 vary

between the two CP_MCHANGE modes, and are summarised in Table 27 and Table 28.

When the charge pump output voltage is controlled manually (CP_MCHANGE = 00) or when it is

tracking the PGA gain settings (CP_MCHANGE = 01), the charge pump always takes its supply from

VDD_CP.

Table 27: CP_THRESH_VDD2 settings in DAC_VOL mode (CP_MCHANGE = 10)

CP_THRESH_VDD2 setting

Approximate switching

point (Note 14)

Notes

0x01

-30 dBFS

Do not use. Very power-inefficient as nearly

always VDD/1

0x03

-24 dBFS

Not recommended. Very power-inefficient as

nearly always VDD/1

0x07

-18 dBFS

Good to use but not power efficient

0x0E

-12 dBFS

Good to use

0x10

-10 dBFS

Recommended setting

0x3F

– 0x13

Not recommended

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