EM783 datasheet(30/58 Pages) NXP

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EM783

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Product data sheet

Rev. 2 — 17 January 2014

30 of 58

NXP Semiconductors

EM783

Energy metering IC; 32 kB flash, 8 kB SRAM, 4 kB EEPROM

Conditions: VDD(3V3) = 3.3 V; active mode entered executing code while(1){} from flash; all

peripherals enabled in the SYSAHBCLKCTRL register; all analog peripherals enabled in the

PDRUNCFG register; power mode 0 (see Section 7.18.6.2).

(1) SysOsc and system PLL disabled; IRC enabled.

(2) SysOsc and system PLL enabled; IRC disabled.

Fig 6.

Active mode: Typical supply current IDD versus temperature for different system

clock frequencies (all peripherals enabled)

Conditions: VDD(3V3) = 3.3 V; sleep mode entered from flash; all peripherals disabled in the

SYSAHBCLKCTRL register and PDRUNCFG register; all peripheral clocks disabled; BOD

disabled; power mode 0 (see Section 7.18.6.2).

(1) SysOsc and system PLL disabled; IRC enabled.

(2) SysOsc and system PLL enabled; IRC disabled.

Fig 7.

Sleep mode: Typical supply current IDDversus temperature for different system

clock frequencies (all peripherals disabled)

002aah185

2.7

3.3

3.6

1.6

3.2

4.8

6.4

VDD(3V3) (V)

IDD

(mA)

12 MHz(1)

24 MHz(2)

36 MHz(2)

48 MHz(2)

002aah186

-40

-15

1.6

3.2

4.8

6.4

temperature (°C)

IDD

(mA)

12 MHz(1)

24 MHz(2)

36 MHz(2)

48 MHz(2)

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