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EM783 Datasheet(PDF) 9 Page - NXP Semiconductors |
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EM783 Datasheet(HTML) 9 Page - NXP Semiconductors |
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9 / 58 page ![]() EM783 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved. Product data sheet Rev. 2 — 17 January 2014 9 of 58 NXP Semiconductors EM783 Energy metering IC; 32 kB flash, 8 kB SRAM, 4 kB EEPROM 10 P0_2/SCL/SWCLK/CT16B0_CAP0 [7] I/O I; IA P0_2 — General-purpose digital input/output pin. High-current sink (20 mA) or standard-current sink (4 mA) programmable; true open-drain for all pin functions. Input glitch filter (50 ns) capable. I/O - SCL — I2C-bus clock (true open-drain) input/output with selectable 50 ns input glitch filter. Input glitch filter (50 ns) capable. I- SWCLK — Serial Wire Debug Clock (secondary). Input glitch filter (50 ns) capable. I- CT16B0_CAP0 — Capture input 0 for 16-bit timer 0. 11 P0_3/SDA/SWDIO [7] I/O I; IA P0_3 — General-purpose digital input/output pin. High-current sink (20 mA) or standard-current sink (4 mA) programmable; true open-drain for all pin functions. Input glitch filter (50 ns) capable. I/O - SDA — I2C-bus data (true open-drain) input/output. Input glitch filter (50 ns) capable. I/O - SWDIO — Serial Wire Debug I/O (secondary). Input glitch filter (50 ns) capable. 12 P0_25/SDA [2] I/O I; PU P0_25 — General-purpose digital input/output pin. I/O - SDA — I2C-bus data input/output. This pin is not an I2C-bus open-drain pin[10]. 13 P0_16/ATRG0/CT16B0_CAP1/SCL [8] I/O I; PU P0_16 — General-purpose digital input/output pin. Input glitch filter (10 ns) capable. I- ATRG0 — Conversion trigger for DAC. Input glitch filter (10 ns) capable. I- CT16B0_CAP1 — Capture input 1 for 16-bit timer 0. Input glitch filter (10 ns) capable. I/O - SCL — I2C-bus clock input/output. This pin is not an I2C-bus open-drain pin[10]. Input glitch filter (10 ns) capable. 14 VBIAS [8] I- VBIAS — Bias voltage input for metrology engine. 15 P0_20/SCK0 [2] I/O I; PU P0_20 — General-purpose digital input/output pin. I/O - SCK0 — Serial clock for SSP0. 16 P0_21/CTS/SCLK [2] I/O I; PU P0_21 — General-purpose digital input/output pin. If configured as output, this pin is a high-current source output driver (20 mA). I- CTS — Clear To Send input for USART. I/O - SCLK — Serial clock for USART. 17 P0_22/MISO0 [2] I/O I; PU P0_22 — General-purpose digital input/output pin. Input glitch filter (10 ns) capable. I/O - MISO0 — Master In Slave Out for SSP0. Input glitch filter (10 ns) capable. Table 4. EM783 pin description …continued Pin no. EM783 symbol Type Reset state [1] Description SC SP TP MC3 MC6 |
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