EM783 datasheet(38/58 Pages) NXP

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EM783

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Product data sheet

Rev. 2 — 17 January 2014

38 of 58

NXP Semiconductors

EM783

Energy metering IC; 32 kB flash, 8 kB SRAM, 4 kB EEPROM

10.3 Flash/EEPROM memory

[1]

Number of program/erase cycles.

[2]

Programming times are given for writing 256 bytes to the flash. Data must be written to the flash in blocks of

256 bytes. Flash programming is accomplished via IAP calls (see EM783 user manual). Execution time of

IAP calls depends on the system clock and is typically between 1.5 ms and 2 ms per 256 bytes.

10.4 External clock for oscillator in slave mode

Remark: The input voltage on the XTALIN pin must be

 1.95 V (see Table 6). For

connecting the oscillator to the XTALIN/XTALOUT pins, see Section 12.1.

[1]

Parameters are valid over operating temperature range unless otherwise specified.

[2]

Typical ratings are not guaranteed. The values listed are at room temperature (25

C), nominal supply

voltages.

Table 10.

Flash characteristics

Tamb = 40 C to +85 C. Based on JEDEC NVM qualification. Failure rate < 10 ppm for parts as

specified below.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Nendu

endurance

[1] 10000

100000

cycles

tret

retention time

powered

years

unpowered

years

ter

erase time

sector or multiple

consecutive

sectors

100

105

tprog

programming

time

[2] 0.95

1.05

Table 11.

EEPROM characteristics

Tamb = 40 Cto+85 C; VDD(3V3) = 2.6 V to 3.6 V. Based on JEDEC NVM qualification. Failure rate

< 10 ppm for parts as specified below.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Nendu

endurance

100000

1000000

cycles

tret

retention time

powered

100

200

years

unpowered

150

300

years

ter

erase time

64 bytes

1.8

tprog

programming

time

64 bytes

1.1

Table 12.

Dynamic characteristic: external clock (XTALIN or CLKIN pin)

Tamb = 40 C to +85 C; VDD(3V3) over specified ranges.[1]

Symbol

Parameter

Conditions

Min

Typ[2]

Max

Unit

fosc

oscillator frequency

MHz

tcy(clk)

clock cycle time

1000

tCHCX

clock HIGH time

tcy(clk)  0.4

--ns

tCLCX

clock LOW time

tcy(clk)  0.4

--ns

tCLCH

clock rise time

tCHCL

clock fall time

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