EM783-SC datasheet(16/58 Pages) NXP

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EM783

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Product data sheet

Rev. 2 — 17 January 2014

16 of 58

NXP Semiconductors

EM783

Energy metering IC; 32 kB flash, 8 kB SRAM, 4 kB EEPROM

• Control of the digital output slew rate allowing to switch more outputs simultaneously

without degrading the power/ground distribution of the device.

7.9 USART

The EM783 contains one USART.

Support for RS-485/9-bit mode allows both software address detection and automatic

address detection using 9-bit mode.

The USART includes a fractional baud rate generator. Standard baud rates such as

115200 Bd can be achieved with any crystal frequency above 2 MHz.

7.9.1 Features

• Maximum USART data bit rate of 3.125 MBit/s.

• 16 byte Receive and Transmit FIFOs.

• Register locations conform to 16C550 industry standard.

• Receiver FIFO trigger points at 1 B, 4 B, 8 B, and 14 B.

• Built-in fractional baud rate generator covering wide range of baud rates without a

need for external crystals of particular values.

• FIFO control mechanism that enables software flow control implementation.

• Support for RS-485/9-bit mode.

• Supports a full modem control handshake interface.

• Support for synchronous mode.

7.10 SSP serial I/O controller

The EM783 contains one SSP controller.

The SSP controller can operate on a SPI, 4-wire SSI, or Microwire bus. It can interact with

multiple masters and slaves on the bus. Only a single master and a single slave can

communicate on the bus during a given data transfer. The SSP supports full-duplex

transfers, with frames of 4 bits to 16 bits of data. The data flows from the master to the

slave and from the slave to the master. In practice, often only one of the data-flows carries

meaningful data.

7.10.1 Features

• Maximum SSP speed of 25 Mbit/s (master) or 4.17 Mbit/s (slave) (in SPI mode).

• Compatible with Motorola SPI, 4-wire Texas Instruments SSI, and National

Semiconductor Microwire buses.

• Synchronous serial communication.

• Master or slave operation.

• 8-frame FIFOs for both transmit and receive.

• 4-bit to 16-bit frame.

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