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EM783-SC Datasheet(PDF) 26 Page - NXP Semiconductors

Part # EM783-SC
Description  Energy metering IC; 32 kB flash, 8 kB SRAM, 4 kB EEPROM
PDF  58 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

EM783-SC Datasheet(HTML) 26 Page - NXP Semiconductors

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EM783
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 17 January 2014
26 of 58
NXP Semiconductors
EM783
Energy metering IC; 32 kB flash, 8 kB SRAM, 4 kB EEPROM
[7]
A Metrology engine input voltage above 3.6 V can be applied for a short time without leading to immediate, unrecoverable failure.
Accumulated exposure to elevated voltages at 4.6 V must be less than 10^6 s total over the lifetime of the device. Applying an elevated
voltage to the metrology engine inputs for a long time affects the reliability of the device and reduces its lifetime.
[8]
Dependent on package type.
[9]
Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 k
 series resistor.
9.
Static characteristics
Table 6.
Static characteristics
Tamb = 40 C to +85 C, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ[1]
Max
Unit
VDD(3V3)
supply voltage (3.3 V)
2.6
3.3
3.6
V
VDD(IO)
input/output supply
voltage
2.6
3.3
3.6
V
IDD
supply current
Active mode; code
while(1){}
executed from flash;
VDD(3V3) = VDD(IO) = 3.3 V;
low-current mode (see
Section 7.18.6.2)
system clock = 12 MHz;
all peripherals disabled
[2][4][5] -3
-mA
system clock = 48 MHz;
all peripherals disabled
[2][6][5] -8
-mA
Sleep mode;
system clock = 12 MHz;
VDD(3V3) = VDD(IO) = 3.3 V;
power mode 0 (see
Section 7.18.6.2)
all peripherals disabled;
12 MHz
[2][4][5] -2
-mA
all peripherals disabled;
48 MHz
[2][4][5] -5
-mA
Standard port pins, RESET
IIL
LOW-level input current VI = 0 V; on-chip pull-up
resistor disabled
-
0.5
1000
nA
IIH
HIGH-level input
current
VI =VDD(IO); on-chip
pull-down resistor
disabled
-
0.5
1000
nA
IOZ
OFF-state output
current
VO =0V; VO =VDD(IO);
on-chip pull-up/down
resistors disabled
-
0.5
1000
nA
VI
input voltage
pin configured to provide
a digital function
5 V tolerant pins
[7][8] 0-
5.0
V
3 V tolerant pins:
P0_4 and P0_5
[7][8]
VDD(IO)
VO
output voltage
output active
0
-
VDD(IO)
V
VIH
HIGH-level input
voltage
0.7VDD(IO)
--V



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