 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
PCAL9714 Datasheet(PDF) 9 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
PCAL9714 Datasheet(HTML) 9 Page - NXP Semiconductors |
|
|
9 / 56 page  NXP Semiconductors PCAL9714 Ultra low-voltage translating 14-bit SPI I/O expander with Agile I/O features, interrupt output, and reset addresses (reserved registers) are skipped. If more than 36 bytes are written, the address will loop back to the register which is indicated by the seven low-order bits in the pointer register, and previously-written data will be overwritten. The deassertion of chip select (CS) condition will keep the pointer register value in the last read or write location. When the Auto-Increment bit is cleared (AI = 0), the 2 least significant bits are automatically incremented after a read or write for 3-register group which allows the user to program each of the 3-register group sequentially. If more than 3 bytes of data are read or written when AI is 0, previous data in the selected registers will be overwritten. For example: if input port 1 is read first, the next 2nd byte will be input port 2, and next 3nd byte will be input port 0, there is no limit on the number of data bytes for this read operation. There are two special 6-register groups: output drive strength (40h~43h) and interrupt edge (50h~53h) registers will allow user to program each of the 6-register group sequentially. Only Output port configuration register location (4Fh) remains in the same location after a successive read or write. aaa-015941 0 0 0 0 0 0 0 0 default value at power-up or HW reset AI B6 B5 B4 B3 B2 B1 B0 AI = Auto-Increment Figure 4. Pointer register bits Pointer register bits B7 B6 B5 B4 B3 B2 B1 B0 Command byte (hexadecimal) Register Protocol Power-up default 0 0 0 0 0 0 0 0 00h Input port 0 read byte xxxx xxxx[1] 0 0 0 0 0 0 0 1 01h Input port 1 read byte xxxx xxxx[1] 0 0 0 0 0 0 1 0 02h Output port 0 read/write byte 1111 1111 0 0 0 0 0 0 1 1 03h Output port 1 read/write byte 1111 1111 0 0 0 0 0 1 0 0 04h Polarity Inversion port 0 read/write byte 0000 0000 0 0 0 0 0 1 0 1 05h Polarity Inversion port 1 read/write byte 0000 0000 0 0 0 0 0 1 1 0 06h Configuration port 0 read/write byte 1111 1111 0 0 0 0 0 1 1 1 07h Configuration port 1 read/write byte 1111 1111 0 1 0 0 0 0 0 0 40h Output drive strength register 0A read/write byte 1111 1111 0 1 0 0 0 0 0 1 41h Output drive strength register 0B read/write byte 1111 1111 0 1 0 0 0 0 1 0 42h Output drive strength register 1A read/write byte 1111 1111 0 1 0 0 0 0 1 1 43h Output drive strength register 1B read/write byte 1111 1111 0 1 0 0 0 1 0 0 44h Input latch register 0 read/write byte 0000 0000 0 1 0 0 0 1 0 1 45h Input latch register 1 read/write byte 0000 0000 0 1 0 0 0 1 1 0 46h Pullup/pulldown enable register 0 read/write byte 0000 0000 Table 6. Command byte PCAL9714 All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved. Product data sheet Rev. 1.0 — 1 May 2023 9 / 56 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
