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DP83255AVF Datasheet(PDF) 47 Page - National Semiconductor (TI) |
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DP83255AVF Datasheet(HTML) 47 Page - National Semiconductor (TI) |
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47 / 96 page ![]() 50 Registers (Continued) CURRENT LINK ERROR COUNT REGISTER (CLECR) The Current Link Error Count Register takes a snap-shot of the Link Error Monitor Counter during every Control Bus Interface read-cycle of this register During a Control Bus Interface write-cycle the PLAYER device will set the Control Bus Write Command Reject bit (CCR) of the Interrupt Condition Register (ICR) to 1 and will ignore a write-cycle ACCESS RULES ADDRESS READ WRITE 16h Always Write Reject D7 D6 D5 D4 D3 D2 D1 D0 LEC7 LEC6 LEC5 LEC4 LEC3 LEC2 LEC1 LEC0 Bit Symbol Description D0–7 LEC0–7 LINK ERROR COUNT BIT k0–7l 47 |
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