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AD7764 Datasheet(PDF) 17 Page - Analog Devices

Part # AD7764
Description  24-Bit 312 kSPS 109dB ADC With On-Chip Buffers Serial Interface
PDF  21 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7764 Datasheet(HTML) 17 Page - Analog Devices

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Preliminary Technical Data
AD7764
Rev. PrC | Page 17 of 21
DRIVING THE AD7764
The AD7764 has an on-chip differential amplifier. This
amplifier will operate with a supply voltage (AVDD3) from 3V to
5.5V. For a 4.096V reference, the supply voltage must be 5V.
To achieve the specified performance in normal power mode,
the differential amplifier should be configured as a first order
anti-alias filter as shown in Figure 20. Any additional filtering
should be carried out in previous stages using low noise, high-
performance op-amps such as the AD8021.
Suitable component values for the first order filter are listed in
Table 7. Using the first row as an example would yield a 10dB
attenuation at the first alias point of 19MHz.
A1
RIN
RFB
CFB
RIN
RM
RM
CS
RFB
CFB
VIN–
A
B
VIN+
Figure 20. Differential Amplifier Configuration
Table 7.First-Order Filter Component Values
VREF
RIN
RFB
RM
CS
CFB
4.096v
4.75kΩ
3.01kΩ
43Ω
1.2pF
33pF
Figure 21 shows the signal conditioning that occurs using the
circuit in Figure 20 with a ±2.5V input signal biased around
ground using the component values and conditions in Table 7.
The differential amplifier will always bias the output signal to sit
on the optimum common mode of VREF/2, in this case 2.048V.
The signal is also scaled to give the maximum allowable voltage
swing with this reference value. This is calculated as 80% of
VREF, i.e. 0.8 × 4.096V ≈ 3.275V peak to peak on each input.
To obtain maximum performance from the AD7764, it is advisable
to drive the ADC with differential signals. Figure 22 shows how a
bipolar, single-ended signal biased around ground can drive the
AD7764 with the use of an external op amp, such as the AD8021
With a 4.096 V reference, a 5 V supply must be provided to the
reference buffer (AVDD4).
+2.5V
0V
–2.5V
+2.5V
0V
–2.5V
+3.685V
+2.048V
+0.410V
+3.685V
+2.048V
+0.410V
A
VIN+
VIN–
B
Figure 21. Differential Amplifier Signal Conditioning.
A1
RIN
RIN
RFB
RFB
CFB
CFB
VIN-
VIN+
AD8021
R
VIN
2R
2R
CS
Figure 22. Single Ended to Differential Conversion
The AD7764 employs a double sampling front end,as shown in
Figure Figure 23. For simplicity, only the equivalent input
circuitry for VIN+ is shown. The equivalent circuitry for VIN- is
the same.
CS2
CPB2
SS4
SH4
CPA
SS2
SH2
CS1
CPB1
SS3
SH3
SS1
SH1
ANALOG
MODULATOR
VIN+
Figure 23. Equivalent Input Circuit



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