Preliminary Technical Data

AD7764

Rev. PrC | Page 19 of 21

AD7764 REGISTERS

The AD7764 has a number of user-programmable registers. The control register is used to set the functionality of the on-chip buffer and

differential amplifier. and also provides the user the option to power down the AD7764. There are also digital gain and over-range

threshold registers. Writing to these registers involves writing the register address first, then a 16-bit data word. Register Addresses, details

of individual bits and default values are given here:

Table 9 Control Register (Address 0x0001, Default Value 0x001A)

MSB

LSB

0

RD Ovr

RD Gain

0

RD Stat

0

SYNC

0

Bypass Ref

0

0

0

Pwr Down

0

Ref Buf Off

Amp Off

Bit

Mnemonic

Comment

14

Read Overrange. If this bit has been set, the next read operation will output the contents of the Overrange Threshold

Register instead of a conversion result.

13

Read Gain. If this bit has been set, the next read operation will output the contents of the digital Gain Register.

11

Read Status. If this bit has been set, the next read operation will output the contents of the Status Register.

9

Synchronize. Setting this bit will initiate in internal synchronisation routine. Setting this bit simultaneously on multiple

devices will synchronize all filters.

7

By-Pass Ref

By-passes reference buffer if the buffer is off.

3

Pwr Down

A logic high powers the part down, however, no reset is done. Writing a 0 to this bit powers the part back up.

2

0

Set this bit to logic zero.

1

Ref Buf Off

Asserting this bit powers down the reference buffer.

0

Amp Off

Asserting this bit switches the differential amplifier off.

Table 10. Status Register (Read Only)

MSB

LSB

PART 1

1

DIE 2

DIE 1

DIE 0

DVALID

LPWR

OVR

0

1

0

Ref Buf On

Amp On

0

DEC 1

DEC 0

Bit

Mnemonic

Comment

15,14

PART1:0

Part Number. These bits will be constant for the AD7764.

13 to 11

DIE2:0

Die Number. These bits will reflect the current AD7764 die number for identification purposes within a system.

10

DVALID

Data Valid. This bit corresponds to the DVALID bit in the status word output in the second 16-bit read operation.

9

0

This bit is set to logic zero.

8

OVR

If the current analog input exceeds the current overrange threshold, this bit will be set.

4

Ref Buf On

This bit is set when the reference buffer is in use.

3

Amp On

This bit is set when the input amplifier is in use.

1 to 0

DEC1:0

Decimation Rate. These bits correspond to decimation rate that is in use.