ADS7066 datasheet(34/48 Pages) TI

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Table 7-25. DIAGNOSTICS_EN Register Field Descriptions (continued)

Bit

Field

Type

Reset

Description

VTEST_EN

R/W

Enable measurement of internal 1.8 V (typical) test voltage using

AIN6. When using this mode, AIN6 pin should not be left floating and

should not be connected to any external circuit. If BITWALK_EN =

1b, this bit has no effect.

0b = Normal operation.

1b = AIN6 is internally connected to 1.8V (typical) test voltage. AIN6

pin should be floating and should not be connected to any external

circuit.

3-1

RESERVED

000b

Reserved Bit

BITWALK_EN

R/W

Enable bit-walk mode of the ADC bit decisions.

0b = Normal operation.

1b = Bit walk mode enabled.

7.5.16 BIT_SAMPLE_LSB Register (Address = 0xC1) [Reset = 0x00]

BIT_SAMPLE_LSB is shown in BIT_SAMPLE_LSB Register Field Descriptions.

Return to the Summary Table.

Table 7-26. BIT_SAMPLE_LSB Register Field Descriptions

Bit

Field

Type

Reset

Description

7-0

BIT_SAMPLE_LSB[7:0]

R/W

00000000b

Define the [7:0] bit positions during sampling phase of the ADC. This

field has no effet when DIAG_EN = 0.

7.5.17 BIT_SAMPLE_MSB Register (Address = 0xC2) [Reset = 0x00]

BIT_SAMPLE_MSB is shown in BIT_SAMPLE_MSB Register Field Descriptions.

Return to the Summary Table.

Table 7-27. BIT_SAMPLE_MSB Register Field Descriptions

Bit

Field

Type

Reset

Description

7-0

BIT_SAMPLE_MSB[7:0]

R/W

00000000b

Define the [15:8] bit positions during sampling phase of the ADC.

This field has no effet when DIAG_EN = 0.

ADS7066

SBAS928B – FEBRUARY 2020 – REVISED MAY 2023

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