ADS7066 datasheet(20/48 Pages) TI

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SCLK

MSB

SDO

16 bit ADC data

LSB

MSB

SDO

20 bit averaged ADC data

LSB

Channel ID / Status Flags

4 bits optional

Channel ID / Status Flags

4 bits optional

Data output when averaging is disabled

OSR[2:0] = 00b

Data output when averaging is enabled

OSR[2:0] > 00b

Figure 7-4. SPI Frames for Reading Data

7.3.9.1 Status Flags

Status flags can be appended to the ADC output by setting APPEND_STATUS = 10b. The status flag is

appended only to frames where ADC data are being read. Status flags are not appended to data corresponding

to a register read operation or when FIX_PAT = 1b. The 4-bit status flag field is constructed as follows:

Status flag[3:0] = { 1, VTEST_MODE, CRCERR_IN, DIAG_MODE }

where:

• VTEST_MODE: This flag is set if the current data frame corresponds to fixed voltage test mode (see the

Fixed Voltage Test Mode section).

• CRCERR_IN: This flag indicates the status of the CRC verification of data received from the digital interface.

This flag is the same as the CRCERR_IN bit in the SYSTEM_STATUS register.

• DIAG_MODE: This flag is set if the current data frame corresponds to the bit-walk test mode (see the

Bit-Walk Test Mode section).

7.3.9.2 Output CRC (Device to Host)

A CRC byte can be appended to the output data by configuring CRC_EN to 1b. When the CRC module is

enabled, the host must use 32-bit frames for SPI communication. The device outputs the data payload followed

by the CRC byte computed over the data payload. Additional 0s can be appended by the ADC after the

CRC byte to complete the 32-bit SPI frame (see Table 7-4). The host must compute and compare the CRC

corresponding to the data payload with the CRC received from the ADC. The additional 0s appended by the

device after the CRC byte must be excluded by the host for computing the CRC.

7.3.9.3 Input CRC (Host to Device)

When the CRC module is enabled, the host must always communicate with the ADC using 32-bit SPI frames

comprised of a 24-bit data payload and an 8-bit CRC byte. The host must calculate the CRC byte to be

appended based on a 24-bit payload. The ADC computes a CRC over the 24-bit data payload and compares the

result with the CRC received from the host.Table 7-4 lists the output data frames for the CRC_EN bit.

ADS7066

SBAS928B – FEBRUARY 2020 – REVISED MAY 2023

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