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LP5860 Datasheet(PDF) 23 Page - Texas Instruments |
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LP5860 Datasheet(HTML) 23 Page - Texas Instruments |
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23 / 71 page ![]() MOSI MISO MCU VIO_EN GND Device 0 SCLK SS VIO VSYNC MOSI MISO VIO_EN GND Device N SCLK SS VSYNC SS 0 SS N IFS IFS VIO VIO Figure 8-16. SPI Multiple Devices Connection 8.6 Register Maps Table 8-8 lists the memory-mapped registers of the device. Table 8-8. Register Section/Block Access Type Codes Access Type Code Description Read Type R R Read RC R Read C to Clear R-0 R Read -0 Returns 0 Write Type W W Write W0CP W W 0C 0 to clear P Requires privileged access Reset or Default Value -n Value after reset or the default value Register Address Type D7 D6 D5 D4 D3 D2 D1 D0 Default Chip_en 000h R/W Reserved Chip_EN 00h Dev_initial 001h R/W Reserved Data_Ref_Mode PWM_Fre 5Eh Dev_config1 002h R/W Reserved PWM_Sc ale_Mode PWM_Ph ase_Shift Reserved 00h Dev_config2 003h R/W Comp_Group3 Comp_Group2 Comp_Group1 Reserved 00h Dev_config3 004h R/W Reserved Maximum_Current Reserved 47h www.ti.com LP5861T SNVSCE4 – MAY 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 23 Product Folder Links: LP5861T |
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