SLG47502V datasheet(6/192 Pages) RENESAS

6 / 192 page

Datasheet

28-Feb-2023

CFR0011-120-00

Revision 2.3

6 of 194

SLG47512/13

Low Voltage GreenPAK Programmable

Mixed-Signal Matrix

Preliminary

Tables

Table 1: Functional Pin Description............................................................................................................................................ 9

Table 2: Pin Type Definitions ...................................................................................................................................................12

Table 3: Absolute Maximum Ratings........................................................................................................................................13

Table 4: Electrostatic Discharge Ratings .................................................................................................................................13

Table 5: Recommended Operating Conditions ........................................................................................................................13

Table 6: EC at T = -40 °C to +85 °C, VDD = 1.0 V to 1.65 V Unless Otherwise Noted ............................................................14

Table 7: EC of the I2C Pins for DI Mode at T = -40 °C to +85 °C, Full VDD Range Unless Otherwise Noted..........................16

Table 8: EC of the I2C Pins for DILV Mode at T = -40 °C to +85 °C, Full VDD Range Unless Otherwise Noted......................16

Table 9: I2C Pins Timing Characteristics for DI Mode, T = -40 °C to +85 °C, Full VDD Range Unless Otherwise Noted ........17

Table 10: I2C Pins Timing Characteristics for DILV Mode, T = -40 °C to +85 °C, Full VDD Range Unless Otherwise Noted ..17

Table 11: Typical Current Estimated for Each Macrocell at T = 25 °C.....................................................................................19

Table 12: Typical Delay Estimated for Each Macrocell at T = 25 °C........................................................................................19

Table 13: Programmable Delay Expected Typical Delays and Pulse Widths at T = 25 °C.....................................................22

Table 14: Typical Filter Pulse Width.........................................................................................................................................22

Table 15: Typical Counter/Delay Offset at T = 25 °C ..............................................................................................................22

Table 16: Oscillators Frequency Limits, VDD = 1.0 V to 1.65 V ..............................................................................................23

Table 17: Oscillators Power-On Delay at T = 25 °C, VDD = 1.0 V to 1.65 V, OSC Power Setting: "Auto Power-On" ..............23

Table 18: ACMP Specifications at T = -40 °C to +85 °C, VDD = 1.0 V to 1.65 V Unless Otherwise Noted..............................23

Table 19: TS Output vs Temperature .......................................................................................................................................25

Table 20: Matrix Input Table.....................................................................................................................................................35

Table 21: Matrix Output Table..................................................................................................................................................37

Table 22: Connection Matrix Virtual Inputs ..............................................................................................................................40

Table 23: 2-bit LUT2_0 to 2-bit LUT2_2 Truth Table ...............................................................................................................46

Table 24: 2-bit LUT Standard Digital Functions .......................................................................................................................46

Table 25: 2-bit LUT2_3 Truth Table .........................................................................................................................................48

Table 26: 2-bit LUT Standard Digital Functions .......................................................................................................................48

Table 27: 3-bit LUT3_0 to 3-bit LUT3_9 Truth Table ...............................................................................................................58

Table 28: 3-bit LUT Standard Digital Functions .......................................................................................................................58

Table 29: 4-bit LUT0 Truth Table .............................................................................................................................................62

Table 30: 4-bit LUT Standard Digital Functions .......................................................................................................................63

Table 31: 3-bit LUT10 to 3-bit LUT16 Truth Table ...................................................................................................................72

Table 32: 4-bit LUT1 Truth Table .............................................................................................................................................75

Table 33: 4-bit LUT Standard Digital Functions .......................................................................................................................75

Table 34: ACMP Input Selection ..............................................................................................................................................91

Table 35: Vref Selection Table .................................................................................................................................................97

Table 36: Oscillator Operation Mode Configuration Settings ................................................................................................. 102

Table 37: Read/Write Protection Options...............................................................................................................................120

Table 38: Register Map .......................................................................................................................................................... 124

Table 39: MSL Classification.................................................................................................................................................. 186

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