AD9461 datasheet(21/28 Pages) AD

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AD9461

Rev. 0 | Page 21 of 28

EVALUATION BOARD

Evaluation boards are offered to configure the AD9461 in either

CMOS mode or LVDS mode only. This design represents a

recommended configuration for using the device over a wide

range of sampling rates and analog input frequencies. These

evaluation boards provide all the support circuitry required to

operate the ADC in its various modes and configurations.

Complete schematics are shown in Figure 35 through Figure 38.

Gerber files are available from engineering applications

demonstrating the proper routing and grounding techniques

that should be applied at the system level.

It is critical that signal sources with very low phase noise

(<60 fsec rms jitter) are used to realize the ultimate

performance of the converter. Proper filtering of the input

signal to remove harmonics and lower the integrated noise at

the input is also necessary to achieve the specified noise

performance.

The evaluation boards are shipped with a 115 V ac to 6 V dc

power supply. The evaluation boards include low dropout

regulators to generate the various dc supplies required by the

AD9461 and its support circuitry. Separate power supplies are

provided to isolate the DUT from the support circuitry. Each

input configuration can be selected by proper connection of

various jumpers (see Figure 35).

The LVDS mode evaluation boards include an LVDS-to-CMOS

translator, making them compatible with the high speed ADC

FIFO evaluation kit (HSC-ADC-EVALA-SC). The kit includes a

high speed data capture board that provides a hardware solution

for capturing up to 32 kB samples of high speed ADC output

data in a FIFO memory chip (user upgradeable to 256 kB

samples). Software is provided to enable the user to download

the captured data to a PC via the USB port. This software also

includes a behavioral model of the AD9461 and many other

high speed ADCs.

Behavioral modeling of the AD9461 is also available at

www.analog.com/ADIsimADC. The ADIsimADC™ software

supports virtual ADC evaluation using ADI proprietary behavioral

modeling technology. This allows rapid comparison between the

AD9461 and other high speed ADCs with or without hardware

evaluation boards.

The user can choose to remove the translator and terminations

to access the LVDS outputs directly.

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