GND

A0

ALERT

SDA

SCL

0.1 µF

VS

Power supply voltage

(2.7 V to 5.5 V)

Bus supply rail

(upto 85 V)

IS+

IS

TI Device

LOAD

SH+

IN+

A1

VBUS

SH−

IN−

Figure 8-2. INA781 High-Side Sensing Application Diagram

8.2.1 Design Requirements

The design requirements for the circuit shown in Figure 8-2 are listed in Table 8-3.

Table 8-3. Design Parameters

DESIGN PARAMETER

EXAMPLE VALUE

Power-supply voltage (VS)

5 V

Bus supply rail (VCM)

48 V

Bus supply rail overvoltage fault threshold

54 V

Average Current

36 A

Overcurrent fault threshold (IMAX)

42 A

Temperature

85°C

Charge Accumulation Period

15 minutes

8.2.2 Detailed Design Procedure

8.2.2.1 Configure the Device

The first step to program the INA781 is to properly set the device and ADC configuration registers. On initial

power up, the CONFIG and ADC_CONFIG registers are set to the reset values as shown in Table 7-5 and

Table 7-6. In this default power-on state the device is set with the ADC continuously converting the temperature,

current, and bus voltage. If the default power-up conditions do not meet the design requirements, these registers

must be set properly after each VS power cycle event.

8.2.2.2 Set Desired Fault Thresholds

Fault thresholds are set by programming the desired trip threshold into the corresponding fault register. Table 7-1

lists the supported fault registers. The fault limit registers are 16 bits in length, therefore the effective LSB size

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INA781

SBOSAC0 – JULY 2023

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