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LTC4270 Datasheet(PDF) 6 Page - Analog Devices |
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LTC4270 Datasheet(HTML) 6 Page - Analog Devices |
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6 / 34 page ![]() Data Sheet LTC9101-2A/LTC9102 ELECTRICAL CHARACTERISTICS analog.com Rev. 0 | 6 of 34 The * denotes the specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C. AGND – VEE = 55V and VDD – DGND = 3.3V, unless otherwise noted. (Notes 3 and 4) Table 4. Electrical Characteristics SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Main PoE Supply Voltage AGND – VEE Type 2 Compliant Output * 51 57 V LTC9102 Undervoltage Lockout AGND – VEE * 8.2 9 V VDD VDD Supply Voltage VDD – DGND * 3 3.3 3.6 V Undervoltage Warning 2.8 V Undervoltage Lockout 2.6 VDD Slew Rate, Falling 2.4 ≤ VDD – DGND ≤ 3.0 (Note 7) 20 mV/μs VCAP1, VCAP2 Internal Regulator Supply Voltage VCAP1 – DGND, VCAP2 – DGND (Note 13) 1.2 V VCAP3 Internal 3.3V Regulator Supply Voltage CAP3 – VEE (Note 13) * 3 3.3 3.6 V tCAP3EXT CAP3 External Supply Rise Time 0.5V < CAP3 < VCAP3(Min), EXT3 Tied to CAP3 (Note 7) * 1 ms VCAP4 Internal 4.3V Regulator Supply Voltage CAP4 – VEE (Note 13) * 4.3 V IEE VEE Supply Current PWRIN Pin Connected to AGND, EXT3 LOW, All Gates Fully Enhanced 7.7 11 14 mA 3.3V Rail Supply Current From CAP3 = 3.3V (EXT3 HIGH) 4.2 5.4 6.6 mA IDD VDD Supply Current (VDD – DGND) = 3.3V * 40 60 mA Detection/Connection Check Forced Current Load Resistance 15.5k to 32k * 220 240 260 µA * 143 160 180 µA Forced Voltage Load Resistance 18.5k to 27.5k * 7 8 9 V * 3 4 5 V Detection Current Compliance AGND – OUTn = 0V * 0.8 0.9 mA VOC Detection Voltage Compliance AGND – OUTn, Open Port * 10.4 12 V Detection Voltage Slew Rate AGND – OUTn, CPORT = 150nF (Note 7) 0.01 V/µs Min. Valid Signature Resistance * 15.5 17 18.5 kΩ Max. Valid Signature Resistance * 27.5 29.7 32 kΩ Classification VCLASS Classification Voltage AGND – OUTn, SENSEn – VSSKn < 5mV * 16 20.5 V Classification Current Compliance SENSEn – VSSKn, OUTn = AGND (Note 15) * 7 8 9 mV Classification Threshold SENSEn – VSSKn (Note 15) Class Signature 0 to 1 * 0.5 0.65 0.8 mV Class Signature 1 to 2 * 1.3 1.45 1.6 mV Class Signature 2 to 3 * 2.1 2.3 2.5 mV Class Signature 3 to 4 * 3.1 3.3 3.5 mV Class Signature 4 to Overcurrent * 4.5 4.8 5.1 mV VMARK Classification Mark State Voltage AGND – OUTn, SENSEn – VSSKn < 5mV * 7.5 9 10 V Mark State Current Compliance OUTn = AGND * 7 8 9 mV Gate Driver GATE Pin Pull-Down Current Port Off, GATEn = VEE + 5V 1 mA GATE Pin Fast Pull-Down Current GATEn = VEE + 5V 65 mA GATE Pin On Voltage GATEn – VEE, IGATEn = 1µA * 11 14 V Output Voltage Sense VPG Power Good Threshold Voltage OUTn – VEE * 2 2.4 2.8 V OUT Pin Pull-Up Resistance to AGND Port On 2500 kΩ Port Off * 300 500 700 kΩ |
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