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LTC4270 Datasheet(PDF) 1 Page - Analog Devices |
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LTC4270 Datasheet(HTML) 1 Page - Analog Devices |
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1 / 34 page ![]() Data Sheet LTC9101-2A/LTC9102 12-/24-/48-Port IEEE 802.3 at PoE PSE Controller Rev. 0 DOCUMENT FEEDBACK TECHNICAL SUPPORT Information furnished by Analog Devices is believed to be accurate and reliable "as is". However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. FEATURES ► Fully Compliant IEEE 802.3at Type 1 and 2 PSE ► Up to 48 PSE Ports ► Industry-Standard Register Map ► +80V/–20V Tolerant Port-Facing Pins ► ECC-Protected eFlash and Data RAMs ► Low Power Path Dissipation per Channel ► 100mΩ Sense Resistance ► 30mΩ or Lower MOSFET RDS(ON) ► Chipset Provides Electrical Isolation ► Eliminates Optos and Isolated 3.3V Supply ► Very High Reliability Multipoint PD Detection ► Continuous Per-Port Voltage and Current Monitoring ► 1MHz I2C Compatible Serial Control Interface ► Pin or I2C Programmable PD Power ► Available in 24-Lead 4mm × 4mm (LTC9101‑2A) and 64-Lead 7mm × 11mm (LTC9102) QFN Packages APPLICATIONS ► PoE PSE Switches/Routers and Midspans DESCRIPTION The LTC ®9101-2A/LTC9102 chipset is a (up to) 48-port power sourcing equipment (PSE) controller designed for use in IEEE 802.3at Type 1 and 2 compliant Power over Ethernet (PoE) sys- tems. The LTC9101-2A/LTC9102 is designed to power compliant 802.3af and 802.3at PDs. The LTC9101-2A/LTC9102 chipset deliv- ers lowest-in-industry heat dissipation using low RDS(ON) external MOSFETs and 0.1Ω sense resistance per power channel. A trans- former-isolated communication protocol replaces expensive opto- couplers and a complex isolated 3.3V supply, resulting in significant bill of materials (BOM) cost savings. Advanced power management features include per-port 14‑bit cur- rent/voltage monitoring, programmable current limits, and versatile fast shutdown of preselected ports. PD detection uses a proprietary multipoint detection mechanism, ensuring excellent immunity from false PD identification. 1-event and 2-event physical classification are supported. The LTC9101-2A/LTC9102 includes an I2C serial interface operable up to 1MHz. The LTC9101-2A/LTC9102 is pin or I2C programmable to negotiate PD-delivered power up to 25.5W. TYPICAL APPLICATION Figure 1. 802.3at 2-Pair Application, 1 Port Shown |
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