TMS320DM6441 datasheet(93/229 Pages) TI

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TMS320DM6441

Digital Media System-on-Chip

SPRS359B – SEPTEMBER 2006 – REVISED JANUARY 2007

Table 5-7. Characteristics of the Power-Down Modes

POWER-DOWN

WAKE-UP METHOD

EFFECT ON CHIP'S OPERATION

MODE

Standby

Interrupts

This mode consumes the lowest power, with the

minimum set of modules kept alive that are required to

wake up the chip to a higher power mode. DSP and

coprocessor subsystems are not powered. The rest of

the chip is powered and clocks are suspended, except

for GPIO (interrupts), UARTs, I2C (in slave mode), and

Ethernet MAC. PLLs are operating in bypass mode.

27-MHz clock is the only clock available to the system.

DDR2 clock is suspended and DDR2 is put into

self-refresh mode.

Low Power

Interrupts

This mode is for ARM to sustain some basic control

functions. DSP and coprocessor subsystems are not

powered. The rest of the chip is powered, but most

clocks are suspended, except for ARM, GPIO, UARTs,

SPI, I2C, PWMs, and Timers. PLLs are operating in

bypass mode. 27-MHz clock is the only clock available

to the system. ARM runs at 13.5 MHz, and handles all

peripherals by direct access. DDR2 clock is suspended

and DDR2 is put into self-refresh mode. ARM will not

have access to DDR2 and its caches are either frozen

or inaccessible.

Preview

Interrupts

This mode is for Digital Still Camera (DSC) preview.

DSP and coprocessor subsystems are not powered.

The rest of the chip is powered, and the PLLs are

operating to support the activities needed for preview

processing and data flow. ARM and DDR2 EMIF

operate at nominal frequencies.

Active

N/A

The entire chip is powered. All modules operate at

nominal clock frequency. Unused peripherals have their

clocks suspended. Active peripherals have their clocks

suspended when unneeded.

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