| Electronic Components Datasheet Search |
|
TMS320DM6441 Datasheet(PDF) 25 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
TMS320DM6441 Datasheet(HTML) 25 Page - Texas Instruments |
|
25 / 229 page ![]() www.ti.com TMS320DM6441 Digital Media System-on-Chip SPRS359B – SEPTEMBER 2006 – REVISED JANUARY 2007 Table 2-6. Oscillator/PLL Terminal Functions SIGNAL TYPE(1) OTHER(2) DESCRIPTION NAME NO. OSCILLATOR, PLL MXI/ Crystal input MXI for MX oscillator (system oscillator, typically 27 MHz). L1 I DVDD18 CLKIN If the internal oscillator is bypassed, this is the external oscillator clock input. MXO M1 O DVDD18 Crystal output for MX oscillator MXVDD L5 S (3) 1.8V power supply for MX oscillator MXVSS L2 GND (3) Ground for MX oscillator M24XI F18 I DVDD18 Crystal input for M24 oscillator (24 MHz for USB) M24XO F19 O DVDD18 Crystal output for M24 oscillator M24VDD F16 S (3) 1.8V power supply for M24 oscillator M24VSS F17 GND (3) Ground for M24 oscillator PLLVDD18 M2 S (3) 1.8 Volt power supply for PLLs (system and USB) APLLREFV M3 S (3) Core voltage reference for PLL logic (1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal (2) Specifies the operating I/O supply voltage for each signal (3) For more information, see the Recommended Operating Conditions table Table 2-7. Clock Generator Terminal Functions SIGNAL TYPE(1) OTHER(2) DESCRIPTION NAME NO. CLOCK GENERATOR This pin is multiplexed between the PLL1 clock generator and GPIO. CLK_OUT0/ K1 I/O/Z DVDD18 For the PLL1 clock generator, it is clock output CLK_OUT0. This is configurable for GPIO48 13.5 MHz or 27 MHz clock outputs. CLK_OUT1/ This pin is multiplexed between the USB clock generator, timer, and GPIO. TIM_IN/ E19 I/O/Z DVDD18 For the USB clock generator, it is clock output CLK_OUT1. This is configurable for GPIO49 12 MHz or 24 MHz clock outputs. (1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal (2) Specifies the operating I/O supply voltage for each signal Table 2-8. RESET and JTAG Terminal Functions SIGNAL TYPE(1) OTHER(2)(3) DESCRIPTION NAME NO. RESET IPU RESET L4 I This is the active low global reset input. DVDD18 JTAG IPU TMS E6 I JTAG test-port mode select input DVDD18 – TDO B5 O/Z JTAG test-port data output DVDD18 IPU TDI A5 I JTAG test-port data input DVDD18 IPU TCK A6 I JTAG test-port clock input DVDD18 – RTCK B6 O/Z JTAG test-port return clock output DVDD18 (1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal (2) IPD = internal pulldown, IPU = internal pullup. (To pull up a signal to the opposite supply rail, a 1-k Ω resistor should be used.) (3) Specifies the operating I/O supply voltage for each signal Submit Documentation Feedback Device Overview 25 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |