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UPD17708 Datasheet(PDF) 307 Page - Renesas Technology Corp |
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UPD17708 Datasheet(HTML) 307 Page - Renesas Technology Corp |
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307 / 358 page ![]() 305 µPD17704, 17705, 17707, 17708, 17709 20.6.5 Configuration and function of CE pin interrupt request register The CE pin interrupt request register detects the input signal level of the CE pin. Figure 20-6 shows the configuration of the CE pin interrupt request register. Figure 20-6. Configuration of CE Pin Interrupt Request Register Name Flag symbol b3 C E b2 0 b1 C E C N T S T T b0 I R Q C E Address 3FH Read/Write RNote CE pin interrupt request Power-ON reset WDT&SP reset CE reset Clock stop U U U U 00 0 0 0 0 0 R R 0 1 No interrupt request Interrupt request Sets interrupt request issuance status of CE pin Stops Operates Detects status of CE reset counter Low level is input High level is input Detects status of CE pin Fixed to “0” 0 1 0 1 U: Undefined R: Retained Note IRQCE is a R/W flag. |
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