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UPD178024 Datasheet(PDF) 8 Page - Renesas Technology Corp |
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UPD178024 Datasheet(HTML) 8 Page - Renesas Technology Corp |
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8 / 58 page ![]() 6 µPD178023, 178024 Data Sheet U14126EJ2V0DS00 PIN CONFIGURATION (Top View) • 80-pin plastic QFP (14 × 20) µPD178023GF-×××-3B9, 178024GF-×××-3B9 Cautions 1. Directly connect the IC (Internally Connected) to GND. 2. Keep the voltage at VDDPORT and VDDPLL at the same voltage as VDD. 3. Keep the voltage at GNDPORT and GNDPLL at the same voltage as GND. 4. Connect each of the REGOSC and REGCPU pins to GND via 0.1- µF capacitor. P121 P120 P37 P36/BEEP0 P35 P34/TI51 P33/TI50 P32 P31 P30 P67 P66 P65 P64 P63 P62 P61 P60 P57 P56 P55 P54 P53 P52 VDD RESET P10/ANI0 P11/ANI1 P12/ANI2 P13/ANI3 P14/ANI4 P15/ANI5 P70/SI3 P71/SO3 P72/SCK3 P73 P74/RXD0 P75/TXD0 P76/SDA0 P77/SCL0 P130/TO50 P131/TO51 P132 P40 P41 P42 GNDPORT VDDPORT 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 |
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