MP4864A

– 64-CHANNEL, HIGH-VOLTAGE, SPST ANALOG SWITCH

MP4864A Rev. 1.0

MonolithicPower.com

16

10/20/2021

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© 2021 MPS. All Rights Reserved.

APPLICATION INFORMATION

Description

The MP4864A is a 64-channel, high-voltage,

single-pole single-throw (SPST) analog switch

with integrated output bleed resistors. It is

designed

for

medical

ultrasound

imaging

applications, as well as for non-destructive

testing

(NDT)

applications.

The

device

is

designed to multiplex high transmission voltages

to the selected piezoelectric transducer, and to

multiplex the small analog echo signal to the

selected receiver.

The output switches are controlled by a 64-bit

serial shift register, followed by a 64-bit data

latch. A data out (DOUT) pin allows for multiple

devices to be cascaded together. This helps

minimize the number of input/output (I/O) control

lines. A logic high signal in the data latch turns

on the corresponding analog switch; a logic low

signal turns off the corresponding analog switch.

The MP4864A has a unique, patented design

that does not require any high-voltage negative

or positive supplies. As a result, the MP4864A

eliminates the following:

 The need to generate high-voltage positive

and negative supplies

 The need for high-voltage bypass capacitors

next to each device

 Safety concerns on high-voltage buses

 Concerns

for

start-up/shutdown

fault

conditions

Analog Switch

Analog switches have a typical switch resistance

of 14

Ω. In the on state, the MP4864A can pass

transmission voltages up to ±90V with peak

currents of up to ±2A. In the off state, it can block

voltages up to ±90V.

Each switch has a dedicated input and output

pin, SWIN and SWOUT. The transmission

voltages must be connected to the SWIN pins,

and the PZT load to the SWOUT pins. The SWIN

and SWOUT pins are not interchangeable.

Short bursts of high-voltage pulses make up

typical high-voltage transmission waves. The

burst can consist of a single cycle to multiple

cycles of 1MHz to 15MHz pulses, starting and

ending at 0V (see Figure 12).

Figure 12: Typical Tx High Voltage Burst

The SWIN input must be close to ground before

sending the high-voltage pulses. This allows the

internal circuitry to properly drive the output

switches.

Transmission

voltages

above

±5V

require

frequencies

above

500kHz.

There

is

no

restriction when receiving echo signals in which

the voltages are below ±0.5V. The switch can

pass low-voltage DC signals.

Logic Interface

The MP4864A is controlled by a 64-bit serial shift

register, followed by a 64-bit latch. Data is

loaded to the shift register during the rising edge

of the clock. No data is transferred during the

falling edge. Data is shifted to register 0, then

data is shifted out from register 63.

Figure 13 shows the logic interface details.

During the first clock cycle, the first data bit

enters shift register 0. After 63 more clocked

cycles, the first bit is in register 63.

Figure 13: Logic Interface Details

When the latch enable bar (LE\) is low, the data

in the shift registers is transferred into the 64-bit

latch. When LE\ is high, the data in the latches

are held. With high LE\, new data can be shifted

into the 64-bit serial shift register without

affecting the data in the 64-bit latch. The output

switch states follow the data in the 64-bit latch.

Register

0

Latch

0

Clk

DIN

DOUT

LE\

SW0

Control

Register

62

Latch

62

SW62

Control

Register

63

Latch

63

SW63

Control

0V

+90V

-90V