IMX8ULPCEC datasheet(2/105 Pages) NXP

2 / 105 page

Table 1. i.MX 8ULP features (continued)

Feature type

Application processor domain Real-time processor domain

External memory interfaces

FlexSPI Serial flash interface

to quad/octalSPI flash device

Dual FlexSPI Serial flash interface to quad/

octalSPI flash device

3 eMMC/SD host interfaces

supporting eMMC5.1 and

SD3.0

—

32-bit LPDDR3, LPDDR4,

LPDDR4x

Security

Cryptographic acceleration

supporting

• symmetric and

asymmetric ciphering

algorithms

• SHA-256 hashing

algorithm

EdgeLock secure enclave (ELke) as Root of

Trust (RoT)

• Core supporting up-to 216 MHz

• Dedicated boot ROM with Advanced High

Assurance boot (AHAB)

• ECDSA P256 based signature verification

• Support for symmetric Cryptographic

acceleration (SGI)

• Support for Asymmetric Cryptographic

acceleration (PKC)

• NIST compliant RNG with DRGB

• One-Time Programmable electrical fuse

used for security keys

NIST-approved random

number generator

On-The-Fly decryption of the encrypted code

stored in external flash device

32 KB secure RAM

—

Communication, Timer, and Analog

peripherals

• Dual High speed USB

OTG port with integrated

PHY

—

4x UART ports

2x SPI ports

4x SPI ports

4x I2C ports

I3C port

2x I3C ports

2x I2S ports

4x I2S ports

FlexCAN

FlexIO

1 x Ethernet 10/100-

Mbit/s, compliant with the

IEEE802.3-2002 standard.

Secure and non-secure

Watchdog timers

Secure and non-secure Watchdog timer for

CM33. Watchdog timer for the Fusion DSP

Table continues on the next page...

NXP Semiconductors

i.MX 8ULP Applications Processor—Commercial Products, Rev. 1, 09/2023

Data Sheet: Technical Data

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