ATMEGA162 datasheet(73/325 Pages) ATMEL

73 / 325 page

ATmega162/V

2513I–AVR–02/07

Alternate Functions Of Port B

The Port B pins with alternate functions are shown in Table 32.

The alternate pin configuration is as follows:

• SCK – Port B, Bit 7

SCK: Master Clock output, Slave Clock input pin for SPI channel. When the SPI is

enabled as a Slave, this pin is configured as an input regardless of the setting of DDB7.

When the SPI is enabled as a Master, the data direction of this pin is controlled by

DDB7. When the pin is forced by the SPI to be an input, the pull-up can still be con-

trolled by the PORTB7 bit.

• MISO – Port B, Bit 6

MISO: Master Data input, Slave Data output pin for SPI channel. When the SPI is

enabled as a Master, this pin is configured as an input regardless of the setting of

DDB6. When the SPI is enabled as a Slave, the data direction of this pin is controlled by

DDB6. When the pin is forced by the SPI to be an input, the pull-up can still be con-

trolled by the PORTB6 bit.

• MOSI – Port B, Bit 5

MOSI: SPI Master Data output, Slave Data input for SPI channel. When the SPI is

enabled as a Slave, this pin is configured as an input regardless of the setting of DDB5.

When the SPI is enabled as a Master, the data direction of this pin is controlled by

DDB5. When the pin is forced by the SPI to be an input, the pull-up can still be con-

trolled by the PORTB5 bit.

•SS/OC3B – Port B, Bit 4

SS: Slave Select input. When the SPI is enabled as a slave, this pin is configured as an

input regardless of the setting of DDB4. As a Slave, the SPI is activated when this pin is

driven low. When the SPI is enabled as a Master, the data direction of this pin is con-

trolled by DDB4. When the pin is forced by the SPI to be an input, the pull-up can still be

controlled by the PORTB4 bit.

Table 32. Port B Pins Alternate Functions

Port Pin

Alternate Functions

PB7

SCK (SPI Bus Serial Clock)

PB6

MISO (SPI Bus Master Input/Slave Output)

PB5

MOSI (SPI Bus Master Output/Slave Input)

PB4

SS (SPI Slave Select Input)

OC3B (Timer/Counter3 Output Compare Match Output)

PB3

AIN1 (Analog Comparator Negative Input)

TXD1 (USART1 Output Pin)

PB2

AIN0 (Analog Comparator Positive Input)

RXD1 (USART1 Input Pin)

PB1

T1 (Timer/Counter1 External Counter Input)

OC2 (Timer/Counter2 Output Compare Match Output)

PB0

T0 (Timer/Counter0 External Counter Input)

OC0 (Timer/Counter0 Output Compare Match Output)

clk

I/O (Divided System Clock)

ATMEGA162 Datasheet(PDF) 73 Page - ATMEL Corporation

ATMEGA162 Datasheet(HTML) 73 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL