ATMEGA649 datasheet(164/375 Pages) ATMEL

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164

ATmega329/3290/649/6490

2552H–AVR–11/06

Note:

1. The baud rate is defined to be the transfer rate in bit per second (bps)

BAUD Baud rate (in bits per second, bps)

OSC

System Oscillator clock frequency

UBRRn Contents of the UBRRnH and UBRRnL Registers, (0-4095)

Some examples of UBRRn values for some system clock frequencies are found in Table

85 (see page 183).

Double Speed Operation

(U2Xn)

The transfer rate can be doubled by setting the U2Xn bit in UCSRnA. Setting this bit

only has effect for the asynchronous operation. Set this bit to zero when using synchro-

nous operation.

Setting this bit will reduce the divisor of the baud rate divider from 16 to 8, effectively

doubling the transfer rate for asynchronous communication. Note however that the

Receiver will in this case only use half the number of samples (reduced from 16 to 8) for

data sampling and clock recovery, and therefore a more accurate baud rate setting and

system clock are required when this mode is used. For the Transmitter, there are no

downsides.

External Clock

External clocking is used by the synchronous slave modes of operation. The description

in this section refers to Figure 71 for details.

External clock input from the XCK pin is sampled by a synchronization register to mini-

mize the chance of meta-stability. The output from the synchronization register must

then pass through an edge detector before it can be used by the Transmitter and

Receiver. This process introduces a two CPU clock period delay and therefore the max-

imum external XCK clock frequency is limited by the following equation:

Note that f

osc depends on the stability of the system clock source. It is therefore recom-

mended to add some margin to avoid possible loss of data due to frequency variations.

Table 77. Equations for Calculating Baud Rate Register Setting

Operating Mode

Equation for Calculating

Baud Rate(1)

Equation for Calculating

UBRRn Value

Asynchronous Normal

mode (U2Xn = 0)

Asynchronous Double

Speed mode

(U2Xn = 1)

Synchronous Master

mode

BAUD

OSC

16 UBRR

()

---------------------------------------

UBRR

OSC

16BAUD

------------------------

–

BAUD

OSC

8 UBRR

()

-----------------------------------

UBRR

OSC

8BAUD

--------------------

–

BAUD

OSC

2 UBRR

()

-----------------------------------

UBRR

OSC

2BAUD

--------------------

–

XCK

OSC

-----------

ATMEGA649 Datasheet(PDF) 164 Page - ATMEL Corporation

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