ATMEGA649 datasheet(174/375 Pages) ATMEL

174 / 375 page

174

ATmega329/3290/649/6490

2552H–AVR–11/06

Disabling the Receiver

In contrast to the Transmitter, disabling of the Receiver will be immediate. Data from

ongoing receptions will therefore be lost. When disabled (i.e., the RXENn is set to zero)

the Receiver will no longer override the normal function of the RxD port pin. The

Receiver buffer FIFO will be flushed when the Receiver is disabled. Remaining data in

the buffer will be lost

Flushing the Receive Buffer

The receiver buffer FIFO will be flushed when the Receiver is disabled, i.e., the buffer

will be emptied of its contents. Unread data will be lost. If the buffer has to be flushed

during normal operation, due to for instance an error condition, read the UDRn I/O loca-

tion until the RXCn Flag is cleared. The following code example shows how to flush the

receive buffer.

Note:

1. See “About Code Examples” on page 8.

Asynchronous Data

Reception

The USART includes a clock recovery and a data recovery unit for handling asynchro-

nous data reception. The clock recovery logic is used for synchronizing the internally

generated baud rate clock to the incoming asynchronous serial frames at the RxD pin.

The data recovery logic samples and low pass filters each incoming bit, thereby improv-

ing the noise immunity of the Receiver. The asynchronous reception operational range

depends on the accuracy of the internal baud rate clock, the rate of the incoming

frames, and the frame size in number of bits.

Asynchronous Clock

Recovery

The clock recovery logic synchronizes internal clock to the incoming serial frames. Fig-

ure 74 illustrates the sampling process of the start bit of an incoming frame. The sample

rate is 16 times the baud rate for Normal mode, and eight times the baud rate for Double

Speed mode. The horizontal arrows illustrate the synchronization variation due to the

sampling process. Note the larger time variation when using the Double Speed mode

(U2Xn = 1) of operation. Samples denoted zero are samples done when the RxD line is

idle (i.e., no communication activity).

Assembly Code Example(1)

USART_Flush:

sbis

UCSR0A, RXC0

ret

r16, UDR0

rjmp

USART_Flush

C Code Example

(1)

void

USART_Flush( void )

{

unsigned char

dummy;

while

( UCSR0A & (1<<RXC0) ) dummy = UDR0;

}

ATMEGA649 Datasheet(PDF) 174 Page - ATMEL Corporation

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