TDA8844 datasheet(12/68 Pages) PHILIPS

12 / 68 page

December 16, 1997

Philips Semiconductors

Tentative Device Speciﬁcation

I2C-bus controlled PAL/NTSC/SECAM TV

processors

TDA884X/5X-N2 series

FUNCTIONAL DESCRIPTION

Vision IF ampliﬁer

The IF-amplifier contains 3 ac-coupled control stages with

a total gain control range which is higher then 66 dB. The

sensitivity of the circuit is comparable with that of modern

IF-IC’s.

The video signal is demodulated by means of an

alignment-free PLL carrier regenerator with an internal

VCO. This VCO is calibrated by means of a digital control

circuit which uses the X-tal frequency of the colour

decoder as a reference. The frequency setting for the

various standards (33.4, 33.9, 38, 38.9, 45.75 and 58.75

MHz) is realised via the I2C-bus. To get a good

performance for phase modulated carrier signals the

control speed of the PLL can be increased by means of the

FFI bit.

The AFC output is generated by the digital control circuit of

the IF-PLL demodulator and can be read via the I2C-bus.

For fast search tuning systems the window of the AFC can

be increased with a factor 3. The setting is realised with the

AFW bit. The AFC data is valid only when the horizontal

PLL is in lock (SL = 1)

Depending on the type the AGC-detector operates on

top-sync level (single standard versions) or on top sync

and top white- level (multi standard versions). The

demodulation polarity is switched via the I2C-bus. The

AGC detector time-constant capacitor is connected

externally. This mainly because of the flexibility of the

application. The time-constant of the AGC system during

positive modulation is rather long to avoid visible variations

of the signal amplitude. To improve the speed of the AGC

system a circuit has been included which detects whether

the AGC detector is activated every frame period. When

during 3 field periods no action is detected the speed of the

system is increased. For signals without peak white

information the system switches automatically to a gated

black level AGC. Because a black level clamp pulse is

required for this way of operation the circuit will only switch

to black level AGC in the internal mode.

The circuits contain a video identification circuit which is

independent of the synchronisation circuit. Therefore

search tuning is possible when the display section of the

receiver is used as a monitor. However, this ident circuit

cannot be made as sensitive as the slower sync ident

circuit (SL) and we recommend to use both ident outputs

to obtain a reliable search system. The ident output is

supplied to the tuning system via the I2C-bus.

The input of the identification circuit is connected to pin 13

(S-DIP 56 devices), the “internal” CVBS input (see Fig.6).

This has the advantage that the ident circuit can also be

made operative when a scrambled signal is received

(descrambler connected between pin 6 (IF video output)

and pin 13). A second advantage is that the ident circuit

can be used when the IF amplifier is not used (e.g. with

built-in satellite tuners).

The video ident circuit can also be used to identify the

selected CBVS or Y/C signal. The switching between the

2 modes can be realised with the VIM bit.

TO LUMA/SYNC PROCESSING

TO CHROMA PROCESSING

(26)

CVBS-2

38(54)

OUT

CVBS-1

OUT

10(20)

11(21)

Y/CVBS-3

17(29)

CVBS-EXT

13(24)

CVBS-INT

VIM

VIDEO IDENT

IDENT

Fig.6 CVBS switch and interfacing of video ident

TDA8844 Datasheet(PDF) 12 Page - NXP Semiconductors

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