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OPA692 Datasheet(PDF) 17 Page - Burr-Brown (TI) |
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OPA692 Datasheet(HTML) 17 Page - Burr-Brown (TI) |
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17 / 31 page ![]() www.ti.com 1/3 OPA3693 +5V DIS R O 50W V O RF 300W R G 300W R M 50W -5V V I 1/3 OPA3693 Open V /2 S V O 60.4W 100W 50 Source W 604W 604W R G 300W R F 300W + 6.8 F m 0.1 F m V I DIS 1000pF +5V V S WIDEBAND UNITY-GAIN BUFFER WITH 2 1 0 -1 -2 -3 -4 -5 -6 10 100 1000 Frequency(MHz) G=+1,Figure43 G=+1,Figure47 OPA3693 SBOS353 – DECEMBER 2006 While the circuit of Figure 45 shows +5V The input impedance is still set by RM as the single-supply operation, this same circuit may be apparent impedance looking into RG is very high. RM used for single supplies ranging as high as +12V may be increased to show a higher input impedance, nominal. The noninverting input bias resistors are but larger values begin to impact dc output offset relatively low in Figure 45 to minimize output dc voltage. offset as a result of noninverting input bias current. At higher signal-supply voltage, these resistors should be increased to limit the added supply current drawn through this path. Figure 46 shows the AC-coupled, G = +1V/V, single-supply specification and test circuit. In this case, the gain setting resistor, RG, is simply left open to get a gain of +1V for ac signals. Once again, the noninverting input is dc biased at midsupply, putting that same VS/2 at the output pin. The signal is AC-coupled into this midpoint with an added termination resistor on the source side of the blocking capacitor. Figure 47. Improved Unity-Gain Buffer This circuit creates an additional input offset voltage as the difference in the two input bias currents times the impedance to ground at VI. Figure 48 shows a comparison of small-signal frequency response for the unity-gain buffer of Figure 43 compared to the improved approach shown in Figure 47. Figure 46. AC-Coupled, G = +1V/V, Single-Supply Specification and Test Circuit IMPROVED FLATNESS As shown in the Typical Characteristic curves, the unity-gain buffer configuration of Figure 43 illustrates a peaking in the frequency response exceeding 2dB. This configuration gives the slight amount of Figure 48. Buffer Frequency Response Comparison overshoot and ringing apparent in the gain of +1V/V pulse response curves. A similar circuit that holds a flatter frequency response, giving improved pulse fidelity, is shown in Figure 47. This circuit removes the peaking by bootstrapping out any parasitic effects on RG. 17 Submit Documentation Feedback |
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