TMDS141 datasheet(6/25 Pages) TI

6 / 25 page

www.ti.com

ELECTRICAL CHARACTERISTICS

TMDS141

SLLS737C – JUNE 2006 – REVISED JUNE 2007

RECOMMENDED OPERATING CONDITIONS (continued)

MIN

NOM

MAX

UNIT

CONTROL PINS (PRE, OE, I2CEN)

VIH

LVTTL High-level input voltage

VCC

VIL

LVTTL Low-level input voltage

GND

0.8

CONTROL PINS (OVS)

VIH

LVTTL High-level input voltage

3.6

VIL

LVTTL Low-level input voltage

-0.5

0.5

I2C PINS (TSCL, TSDA)

VIH

High-level input voltage

0.7VCC

5.5

VIL

Low-level input voltage

-0.5

0.3VCC

VICL

Low-level input voltage contention(1)

-0.5

0.4

I2C PINS (RSCL, RSDA)

VIH

High-level input voltage

2.1

5.5

VIL

Low-level input voltage

-0.5

1.5

(1)

VIL specification is for the first low level seen by the SCL/SDA lines. VICL is for the second and subsequent low levels seen by the

TSCL/TSDA lines.

over recommended operating conditions (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP(1)

MAX

UNIT

VIH = VCC, VIL = VCC – 0.4 V, RT = 50 Ω,

AVCC = 3.3 V, RVSADJ = 4.64 kΩ,

ICC

Supply current

108

130(2)

1.65-Gbps HDMI data pattern,

165-MHz Pixel clock, PRE = Low

VIH = VCC, VIL = VCC – 0.4 V, RT = 50 Ω,

AVCC = 3.3 V, RVSADJ = 4.64 kΩ,

Power dissipation

497(2)

1.65-Gbps HDMI data pattern,

165-MHz Pixel clock, PRE = Low

TMDS DIFFERENTIAL PINS (TX, TXC)

VOH

Single-ended high-level output voltage

AVCC–10

AVCC+10

VOL

Single-ended low-level output voltage

AVCC–600

AVCC–400

Vswing

Single-ended output swing voltage

400

600

See Figure 2, AVCC = 3.3 V,

VOD(O)

Overshoot of output differential voltage

15%

× V

swing

RT = 50 Ω

VOD(U)

Undershoot of output differential voltage

25%

× V

swing

Change in steady-state common-mode

∆V

OC(SS)

output voltage between logic states

0 V

≤ V

CC ≤ 1.5 V,

I(O)OFF

Single-ended standby output current

–10

µA

AVCC = 3.3 V, RT = 50 Ω

VOD(pp)

Peak-to-peak output differential voltage

800

1200

See Figure 3, PRE = High,

mVp-p

Steady state output differential voltage

AVCC = 3.3 V, RT = 50 Ω

VODE(SS)

600

820

with de-emphasis

I(OS)

Short circuit output current

See Figure 4

-12

Single-ended input voltage under high

VI(open)

II = 10 µA

VCC–10

VCC+10

impedance input or open input

RINT

Input termination resistance

VIN = 2.9 V

Ω

CONTROL PINS (PRE, OE, I2CEN, OVS)

|IIH|

High-level digital input current

VIH = 2 V or VCC

-10

µA

|IIL|

Low-level digital input current

VIL = GND or 0.8 V

-10

µA

I2C PINS (TSCL, TSDA)

VI = 5.5 V

-50

|Ilkg|

Input leakage current

µA

VI = VCC

-10

|IOH|

High-level output current

VO = 3.6 V

-10

µA

(1)

All typical values are at 25

°C and with a 3.3-V supply.

(2)

The maximum rating is characterized under 3.6 V VCC and 600 mV VID.

Submit Documentation Feedback

TMDS141 Datasheet(PDF) 6 Page - Texas Instruments

TMDS141 Datasheet(HTML) 6 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

Datasheet Download

Link URL