TMDS141 datasheet(17/25 Pages) TI

17 / 25 page

www.ti.com

Master

Slave

DriverR

Driver T

Rdd

Rup

CABLE

SOURCE

slave

Tdd

Tup

medium

RSCL

RSDA

9thClockPulse- AcknowledgeFromSlave

TSCL

TSDA

9thClockPulse- AcknowledgeFromSlave

OfSlave

OfDriver T

TMDS141

SLLS737C – JUNE 2006 – REVISED JUNE 2007

APPLICATION INFORMATION (continued)

Figure 20. Typical Application

Figure 21 illustrates the waveforms seen on the R-side I2C-bus when the master writes to the slave through the

I2C repeater circuit of the TMDS141. This looks like a normal I2C transmission, and the turn on and turn off of

the acknowledge signals are slightly delayed.

Figure 21. Bus R Waveform

Figure 22 illustrates the waveforms seen on the T-side I2C-bus under the same operation in Figure 21. On the

T-side of the I2C repeater, the clock and data lines would have a positive offset from ground equal to the VOL of

the driver T. After the 8th clock pulse, the data line is pulled to the VOL of the slave device which is very close to

ground in this example. At the end of the acknowledge, the slave device releases and the bus level rises back to

the VOL set by the driver until the R-side rises above VCC/2, after which it continues to high. It is important to

note that any arbitration or clock stretching events require that the low level on the T-side bus at the input of the

TMDS141 I2C repeater is below 0.4 V to be recognized by the device and then transmitted to the R-side I2C bus.

Figure 22. Bus T Waveform

The I2C circuitry inside the TMDS141 allows multiple stage operation as shown in Figure 23. I2C-Bus slave

devices can be connected to any of the bus segments. The number of devices that can be connected in series is

limited by repeater delay/time of flight considerations for the maximum bus speed requirements.

Submit Documentation Feedback

TMDS141 Datasheet(PDF) 17 Page - Texas Instruments