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Thermal Dissipation

TMDS141

SLLS737C – JUNE 2006 – REVISED JUNE 2007

Table 2. Pull-Up Resistor Upon Different Threshold Voltages and 800-pF Loads

Vth-\Vth+

0.7VDD

0.65VDD

0.6VDD

0.55VDD

0.5VDD

0.45VDD

0.4VDD

0.35VDD

0.3VDD

UNIT

0.1VDD

1.14

1.32

1.54

1.80

2.13

2.54

3.08

3.84

4.97

Ω

0.15VDD

1.20

1.41

1.66

1.97

2.36

2.87

3.59

4.66

6.44

Ω

0.2VDD

1.27

1.51

1.80

2.17

2.66

3.34

4.35

6.02

9.36

Ω

0.25VDD

1.36

1.64

1.99

2.45

3.08

4.03

5.60

8.74

18.12

Ω

0.3VDD

1.48

1.80

2.23

2.83

3.72

5.18

8.11

16.87

Ω

Or, limiting the maximum load capacitance of each cable to be 400 pF to accommodate with I2C spec version

2.1. Ccable(max) = 400pF/Csource=50pF/Ci = 50pF, the maximum values of R(max) are calculated as shown in

Table 3.

Table 3. Pull-Up Resistor Upon Different Threshold Voltages and 500-pF Loads

Vth-\Vth+

0.7VDD

0.65VDD

0.6VDD

0.55VDD

0.5VDD

0.45VDD

0.4VDD

0.35VDD

0.3VDD

UNIT

0.1VDD

1.82

2.12

2.47

2.89

3.40

4.06

4.93

6.15

7.96

Ω

0.15VDD

1.92

2.25

2.65

3.14

3.77

4.59

5.74

7.46

10.30

Ω

0.2VDD

2.04

2.42

2.89

3.48

4.26

5.34

6.95

9.63

14.98

Ω

0.25VDD

2.18

2.62

3.18

3.92

4.93

6.45

8.96

13.98

28.99

Ω

0.3VDD

2.36

2.89

3.57

4.53

5.94

8.29

12.97

26.99

Ω

Obviously, to accommodate the 3-mA drive current specification, a narrower threshold voltage range is required

to support a maximum 800-pF load capacitance for a standard-mode I2C bus.

When the input low and high level threshold voltages, Vth- and Vth+, are 0.7 V and 1.9 V, which is 0.15 VDD and

0.4 VDD approximately with VDD = 5 V, from Table 2, the maximum pull-up resistor is 3.59 kΩ. The allowable

pull-up resistor is in the range of 1.83 k

Ω and 3.59 kΩ.

On a high-K board – It is always recommended to solder the PowerPAD™ onto the thermal land. A thermal land

is the area of solder-tinned-copper underneath the PowerPAD package. On a high-K board the TMDS141 can

operate over the full temperature range by soldering the PowerPAD onto the thermal land without vias.

On a low-K board – In order for the device to operate across the temperature range on a low-K board, a 1-oz Cu

trace connecting the GND pins to the thermal land must be used. A simulation shows RθJA = 100.84°C/W

allowing 545 mW power dissipation at 70

°C ambient temperature.

A general PCB design guide for PowerPAD packages is provided in the document SLMA002 - PowerPAD

Thermally Enhanced Package.

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