ADP3192A datasheet(28/32 Pages) AD

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ADP3192A

Rev. 0 | Page 28 of 32

An additional fixed resistor in parallel with the thermistor allows

tuning of the trip point temperatures to match the hottest tem-

perature in the VR when the thermistor itself is directly sensing

a proportionately lower temperature. Setting this resistor value

is best accomplished with a variable resistor during thermal

validation and then fixing this value for the final design.

Additionally, a 0.1 μF capacitor should be used for filtering noise.

SHUNT RESISTOR DESIGN

The ADP3192A uses a shunt to generate 5 V from the 12 V

supply range. A trade-off can be made between the power

dissipated in the shunt resistor and the UVLO threshold.

Figure 16 shows the typical resistor value needed to realize

certain UVLO voltages. It also gives the maximum power

dissipated in the shunt resistor for these UVLO voltages.

550

150

7.0

11.0

VIN (UVLO)

500

450

400

350

300

250

200

0.50

0.10

0.45

0.40

0.35

0.30

0.25

0.20

0.15

7.5

8.0

8.5

9.0

9.5

10.0

10.5

RSHUNT

PSHUNT

Figure 16. Typical Shunt Resistor Value and Power Dissipation

for Different UVLO Voltage

The maximum power dissipated is calculated using Equation 45.

(

)

SHUNT

MIN

MAX

)

(

)

(

−

(45)

where:

VIN(MAX)

is the maximum voltage from the 12 V input supply (if

the 12 V input supply is 12 V ± 5%, VIN(MAX) = 12.6 V; if the 12 V

input supply is 12 V ± 10%, VIN(MAX) = 13.2 V).

VCC(MIN)

is the minimum VCC voltage of the ADP3192A. This is

specified as 4.75 V.

RSHUNT

is the shunt resistor value.

The CECC standard specification for power rating in surface-

mount resistors is: 0603 = 0.1 W, 0805 = 0.125 W, 1206 = 0.25 W.

TUNING THE ADP3192A

Build a circuit based on the compensation values

computed from the design spreadsheet.

Hook up the dc load to the circuit, turn it on, and verify its

operation. Also, check for jitter at no load and full load.

DC Load Line Setting

Measure the output voltage at no load (VNL). Verify that it

is within tolerance.

Measure the output voltage at full load cold (VFLCOLD).

Let the board sit for ~10 minutes at full load, and then

measure the output (VFLHOT). If there is a change of more

than a few millvolts, adjust RCS1 and RCS2 using Equation 46

and Equation 48.

()

FLHOT

FLCOLD

OLD

CS2

NEW

CS2

−

(46)

Repeat Step 4 until the cold and hot voltage measurements

remain the same.

Measure the output voltage from no load to full load using

5 A steps. Compute the load line slope for each change, and

then average to get the overall load line slope (ROMEAS).

If ROMEAS is off from RO by more than 0.05 mΩ, use

Equation 47 to adjust the RPH values.

()

OMEAS

OLD

NEW

(47)

Repeat Step 6 and Step 7 to check the load line. Repeat

adjustments if necessary.

When the dc load line adjustment is complete, do not

change RPH, RCS1, RCS2, or RTH for the remainder of the

procedure.

10. Measure the output ripple at no load and full load with

a scope and make sure it is within specifications.

()

(

)

()

(

)

(

)

()

(

)

()

−

OLD

CS1

NEW

CS2

OLD

CS1

OLD

CS1

OLD

CS1

NEW

CS1

(48)

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