56F8366 datasheet(23/184 Pages) FREESCALE

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Signal Pins

56F8366 Technical Data, Rev. 6

Freescale Semiconductor

Preliminary

(GPIOF0)

Input/

Output

Input/

Output

In reset,

output is

disabled,

pull-up is

enabled

Data Bus — D7 - D14 specify part of the data for external program

or data memory accesses.

Depending upon the state of the DRV bit in the EMI bus control

inactive.

Most designs will want to change the DRV state to DRV = 1 instead of

using the default setting.

Port F GPIO — These eight GPIO pins can be individually

programmed as input or output pins.

At reset, these pins default to Data Bus functionality.

To deactivate the internal pull-up resistor, clear the appropriate

GPIO bit in the GPIOF_PUR register.

Example: GPIOF0, clear bit 0 in the GPIOF_PUR register.

(GPIOF1)

(GPIOF2)

D10

(GPIOF3)

D11

(GPIOF4)

133

D12

(GPIOF5)

134

D13

(GPIOF6)

135

D14

(GPIOF7)

136

D15

(GPIOF8)

137

Input/

Output

Input/

Output

In reset,

output is

disabled,

pull-up is

enabled

Data Bus — D15 specifies part of the data for external program or

data memory accesses.

Most designs will want to change the DRV state to DRV = 1 instead of

using the default setting.

Port F GPIO — This GPIO pin can be individually programmed as

an input or output pin.

At reset, this pin defaults to the data bus function.

To deactivate the internal pull-up resistor, set bit 8 in the

GPIOF_PUR register.

Table 2-2 Signal and Package Information for the 144-Pin LQFP

Signal Name

Pin No.

Type

State

During

Reset

Signal Description

56F8366 Datasheet(PDF) 23 Page - Freescale Semiconductor, Inc

56F8366 Datasheet(HTML) 23 Page - Freescale Semiconductor, Inc

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