56F8366 datasheet(40/184 Pages) FREESCALE

40 / 184 page

56F8366 Technical Data, Rev. 6

Freescale Semiconductor

Preliminary

3.2.3

External Clock Source

The recommended method of connecting an external clock is given in Figure 3-4. The external clock

source is connected to XTAL and the EXTAL pin is grounded. Set OCCS_COHL bit high when using an

external clock source as well.

Figure 3-4 Connecting an External Clock Register

3.3 Registers

When referring to the register definitions for the OCCS in the 56F8300 Peripheral User Manual, use the

NOT contain this oscillator.

Part 4 Memory Map

4.1 Introduction

The 56F8366 and 56F8166 devices are 16-bit motor-control chip based on the 56800E core. These parts

use a Harvard-style architecture with two independent memory spaces for Data and Program. On-chip

RAM and Flash memories are used in both spaces.

This section provides memory maps for:

•

Program Address Space, including the Interrupt Vector Table

•

Data Address Space, including the EOnCE Memory and Peripheral Memory Maps

On-chip memory sizes for each device are summarized in Table 4-1. Flash memories’ restrictions are

identified in the “Use Restrictions” column of Table 4-1.

XTAL

EXTAL

External

VSS

Clock

Note: When using an external clocking source

with this configuration, the input “CLKMODE”

should be high and the COHL bit in the OSCTL

56F8366 Datasheet(PDF) 40 Page - Freescale Semiconductor, Inc