56F8366 datasheet(153/184 Pages) FREESCALE

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Crystal Oscillator Timing

56F8366 Technical Data, Rev. 6

Freescale Semiconductor

153

Preliminary

10.7 Crystal Oscillator Timing

10.8 External Memory Interface Timing

The External Memory Interface is designed to access static memory and peripheral devices. Figure 10-4

shows sample timing and parameters that are detailed in Table 10-16.

The timing of each parameter consists of both a fixed delay portion and a clock related portion, as well as

user controlled wait states. The equation:

t = D + P * (M + W)

should be used to determine the actual time of each parameter. The terms in this equation are defined as:

When using the XTAL clock input directly as the chip clock without prescaling (ZSRC selects prescaler

clock and prescaler is set to ÷ 1), the EMI quadrature clock is generated using both edges of the EXTAL

clock input. In this situation only, parameter values must be adjusted for the duty cycle at XTAL. DCAOE

and DCAEO are used to make this duty cycle adjustment where needed.

Table 10-15 Crystal Oscillator Parameters

Characteristic

Symbol

Min

Typ

Max

Unit

Crystal Start-up time

TCS

Resonator Start-up time

TRS

0.1

0.18

Crystal ESR

RESR

——

120

ohms

Crystal Peak-to-Peak Jitter

—

250

Crystal Min-Max Period Variation

TPV

0.12

—

1.5

Resonator Peak-to-Peak Jitter

TRJ

——

300

Resonator Min-Max Period Variation

TRP

——

300

Bias Current, high-drive mode

IBIASH

—250

290

μA

Bias Current, low-drive mode

IBIASL

—80

110

μA

Quiescent Current, power-down mode

IPD

—0

μA

= Parameter delay time

= Fixed portion of the delay, due to on-chip path delays

= Period of the system clock, which determines the execution rate of the part

(i.e., when the device is operating at 60MHz, P = 16.67 ns)

= Fixed portion of a clock period inherent in the design; this number is adjusted to account

for possible derating of clock duty cycle

= Sum of the applicable wait state controls. The “Wait State Controls” column of

Table 10-16 shows the applicable controls for each parameter and the EMI chapter of the

56F8300 Peripheral User Manual details what each wait state field controls.

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