SAA7740 datasheet(16/28 Pages) PHILIPS

16 / 28 page

1997 May 30

Philips Semiconductors

Product speciﬁcation

Digital Audio Processing IC (DAPIC)

SAA7740H

DC CHARACTERISTICS

VDD = 4.5 to 5.5 V; Tamb =−40 to +85 °C; unless otherwise speciﬁed.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

VDDn

DC supply voltage (pins 7, 8,

26, 32, 38, 53, 54 and 60)

4.5

5.0

5.5

IDD(tot)

total of all DC supply current

pins

fxtal = 16.9344 MHz

−

Ptot

total power dissipation

fxtal = 16.9344 MHz

−

300

−

VIH

HIGH level input voltage

(pins 1, 3, 4, 11, 12, 15, 16,

36, 37, 41 to 45, 47 to 49, 51,

52, 62 and 64)

0.7VDD

−−

VIL

LOW level input voltage

(pins 1, 3, 4, 11, 12, 15, 16,

36, 37, 41 to 45, 47 to 49, 51,

52, 62 and 64)

−−

0.3VDD

Vth(pos)

Schmitt trigger positive-going

threshold (pin 2)

−−

0.8VDD

Vth(neg)

Schmitt trigger negative-going

threshold (pin 2)

0.2VDD

−−

Vhys

hysteresis voltage (pin 2)

−

0.33VDD

−

VOH

HIGH level output voltage

(pins 10 to 12, 14 to 24, 27 to

31, 33 to 35 and 63)

VDD = 4.5 V; IO =4mA

4.0

−−

VOL

LOW level output voltage

(pins 3, 10 to 12, 14 to 24, 27

to 31, 33 to 35 and 63)

VDD = 4.5 V; IO =4mA

−−

0.5

ILI

input leakage current

(pins 1, 2, 4, 36, 37, 41 to 45,

47 to 49, 51, 52 and 62)

VDD = 0 or 5.5 V

−−

±1

µA

IZO

output leakage current; 3-state

(pins 3, 11, 12, 15 and 16)

VDD = 0 or 5.5 V

−−

±5

µA

Rpd

internal pull-down resistance

to VSS (pin 64)

VI =VDD

−

134

Ω

tr(i)

input rise time

VDD = 5.5 V

−

200

tf(i)

input fall time

VDD = 5.5 V

−

200

tr(o)

output rise time for

LOW-to-HIGH transition

VDD = 4.5 V; Tamb =85 °C;

CL = pF; pins 11, 12, 15 and 16

−−

9.5 + 0.4CL

VDD = 4.5 V; Tamb =85 °C;

CL = pF; pins 10, 14, 17 to 24,

27 to 31, 33 to 35 and 63

−−

8.5 + 0.4CL

tf(o)

output fall time for

HIGH-to-LOW transition

VDD = 4.5 V; Tamb =85 °C;

CL = pF; pins 11, 12, 15 and 16

−−

11 + 0.5CL

VDD = 4.5 V; Tamb =85 °C;

CL = pF; pins 10, 14, 17 to 24,

27 to 31, 33 to 35 and 63

−−

9.0 + 0.5CL

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