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SAA7740 Datasheet(PDF) 17 Page - NXP Semiconductors |
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SAA7740 Datasheet(HTML) 17 Page - NXP Semiconductors |
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17 / 28 page  1997 May 30 17 Philips Semiconductors Product specification Digital Audio Processing IC (DAPIC) SAA7740H AC CHARACTERISTICS VDDX =5V; Tamb = +25 °C; unless otherwise specified. TIMING CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT fxtal crystal input frequency ≥384fas 12.288 16.9344 23.0 MHz α f spurious frequency attenuation 20 −− dB I59 crystal current output (pin 59) slave mode only −− 1mA g transconductance at maximum current − 0.4 − mS Vxtal voltage across crystal − 500 − mV CL load capacitance −− 15 pF 1 ⁄2Tclk half clock period of external clock 21 −− ns SYMBOL PARAMETER MIN. MAX. UNIT tHC pulse width HIGH, DIBCK and DOBCK 110 − ns tLC pulse width LOW, DIBCK and DOBCK 110 − ns tr DIBCK and DOBCK rise time − 20 ns tf DIBCK and DOBCK fall time − 20 ns th1 DIWS and DOWS hold time 10 − ns tsu1 DIWS and DOWS set-up time 20 − ns th2 DI1D and DI2D hold time 10 − ns tsu2 DI1D and DI2D set-up time 20 − ns tacc DO1D and DO2D access time − 25 + 0.5CL (CL in pF) ns DRAM timing 1 ⁄2Tclk half clock period 21 − ns tp;RAS RAS precharge time 4 × 1⁄2Tclk − 12 − ns tW;RAS RAS pulse width 16 × 1⁄2Tclk − 12 − ns tsu;RA row address set-up time 1 ⁄2Tclk − 8 − ns th;RA row address hold time 1 ⁄2Tclk − 12 − ns tdRAS;CAS RAS to CAS delay time 2 × 1⁄2Tclk − 11 2 × 1⁄2Tclk + 14 ns th;CAS CAS hold time 4 × 1⁄2Tclk − 12 − ns th;RAS RAS hold time 2 × 1⁄2Tclk − 12 − ns tRAS;CA RAS to column address − 1 ⁄2Tclk +8 ns thCA;RAS column address hold time from RAS 5 × 1⁄2Tclk − 11 − ns thCA;RASp column address hold time from RAS precharge 1 ⁄2Tclk − 12 − ns tlCA;RAS column address to RAS lead time 3 × 1⁄2Tclk − 8 − ns tpCAS;RAS CAS to RAS precharge time 4 × 1⁄2Tclk − 14 − ns tsu;CA column address set-up time 1 ⁄2Tclk − 8 − ns |
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