SAA7740 datasheet(23/28 Pages) PHILIPS

23 / 28 page

1997 May 30

Philips Semiconductors

Product speciﬁcation

Digital Audio Processing IC (DAPIC)

SAA7740H

APPLICATION INFORMATION

Clock circuit and oscillator

The clock generation of the SAA7740H is designed to

accommodate two main modes, the master and the slave.

In the master mode, the DAPIC is the master in the

system. The clock is generated by connecting a crystal to

the oscillator pins CLK1/XTAL1 and XTAL2 (see Fig.16).

In the slave mode, the DAPIC is supplied as a slave.

The external clock should be connected to the oscillator at

pin CLK1/XTAL1 (see Fig.17).

Crystal oscillator supply

The power supply for the oscillator is separate from the

other supply line. This is to minimize feedback from the

ground bounce of the IC to the oscillator. Pin VSSX is the

ground supply and VDDX is the positive supply.

Power supply connection and EMC

The SAA7740H has in total 8 positive supply lines (VDD)

including VDDX, and 8 ground supply lines (VSS) including

VSSX. For correct current distribution all positive supply

lines should be connected together on the printed

circuit-board. The ground supply lines should also be

connected together on the printed circuit-board.

To minimize radiation the IC should be placed on a

double-layer printed circuit-board with a large ground

plane on one side. The ground supply lines should have a

short connection to the ground plane. An LC network in the

positive supply lines can be used as a high frequency filter.

Test mode connections

Pins SCCLK, TSTCLK, TST1, TST2 and TST3 are used to

put the IC in the test mode and to test the internal

connections. In the application these pins must be

connected to ground.

Fig.16 Master mode.

handbook, halfpage

MLC164

CLK1/XTAL1

XTAL2

10 pF

100

Ω

Fig.17 Slave mode.

handbook, halfpage

MLC165

CLK1/XTAL1

XTAL2

max 1 V (p-p)

external

clock

10 pF

30 pF

100

Ω

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