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SAF7113 Datasheet(PDF) 57 Page - NXP Semiconductors

Part # SAF7113
Description  9-bit video input processor
PDF  80 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

SAF7113 Datasheet(HTML) 57 Page - NXP Semiconductors

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2000 May 08
57
Philips Semiconductors
Product specification
9-bit video input processor
SAF7113H
15.2.9
SUBADDRESS 08H
Table 35 Sync control SA 08, D7 to D5, D3 to D0
FUNCTION
CONTROL BIT
LOGIC LEVEL
DATA BIT
Vertical noise reduction (VNOI)
Normal mode (recommended setting)
VNOI1
0
D1
VNOI0
0
D0
Fast mode [applicable for stable sources only; automatic
field detection (AUFD) must be disabled]
VNOI1
0
D1
VNOI0
1
D0
Free running mode
VNOI1
1
D1
VNOI0
0
D0
Vertical noise reduction bypassed
VNOI1
1
D1
VNOI0
1
D0
Horizontal PLL (HPLL)
PLL closed
HPLL
0
D2
PLL open; horizontal frequency fixed
HPLL
1
D2
Horizontal time constant selection (HTC1 and HTC0)
TV mode (recommended for poor quality TV signals
only; do not use for new applications)
HTC1 and HTC0
00
D4 and D3
VTR mode (recommended if a deflection control circuit
is directly connected to SAF7113H)
HTC1 and HTC0
01
D4 and D3
Reserved
HTC1 and HTC0
10
D4 and D3
Fast locking mode (recommended setting)
HTC1 and HTC0
11
D4 and D3
Forced ODD/EVEN toggle FOET
ODD/EVEN signal toggles only with interlaced source
FOET
0
D5
ODD/EVEN signal toggles fieldwise even if source is
non-interlaced
FOET
1
D5
Field selection (FSEL)
50 Hz, 625 lines
FSEL
0
D6
60 Hz, 525 lines
FSEL
1
D6
Automatic field detection (AUFD)
Field state directly controlled via FSEL
AUFD
0
D7
Automatic field detection
AUFD
1
D7



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