SAF7113 datasheet(62/80 Pages) PHILIPS

62 / 80 page

2000 May 08

Philips Semiconductors

Product speciﬁcation

9-bit video input processor

SAF7113H

Table 45 VREF pulse position and length VRLN SA 10 (D3)

Note

1. The numbers given in parenthesis refer to ITU line counting.

Table 46 Fine position of HS HDEL0 and HDEL1 SA 10 (D5 and D4)

Table 47 Output format selection OFTS0 and OFTS1 SA 10 (D7 and D6); see Tables 6 and 7

VRLN

VREF AT 60 Hz 525 LINES

VREF AT 50 Hz 625 LINES

Length

240

242

286

288

Line number

ﬁrst

last

ﬁrst

last

ﬁrst

last

ﬁrst

last

Field 1(1)

19 (22)

258 (261)

18 (21)

259 (262)

309

310

Field 2(1)

282 (285)

521 (524)

281 (284)

522 (525)

337

622

336

623

FINE POSITION OF HS (STEPS IN 2/LLC)

CONTROL BITS D5 AND D4

HDEL1

HDEL0

V-FLAG GENERATION IN

SAV/EAV-CODES

CONTROL BITS D7 AND D6

OFTS1

OFTS0

Standard ITU 656-format

V-ﬂag in SAV/EAV is generated by VREF

V-ﬂag in SAV/EAV is generated by data-type

Reserved

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