9

SPI operation (SEL2 = H)

Figure 13. SPI directional logic convention

SDI

SS

CLK

SDO

WD

OUT_EN

WD_EN

SEL1

SEL2

PG

FAULT

TWARN

OUT1

OUT2

OUT3

OUT4

OUT5

OUT6

OUT7

OUT8

GND

VREG

TAB=Vcc

GIPG030420151337LM

9.1

8-bit SPI mode (SEL1 = L)

If SEL2 = H, the 8-bit SPI mode is based on an 8-bit command frame sent from the microcontroller to the IC. Each

bit directly drives the corresponding output where LSB drives output 0 and MSB drives output 7. Each bit, set to

‘1’, activates (closes) the corresponding output.

At the same time, the IC transfers the channel fault conditions (OVT) to the microcontroller. These fault conditions

are latched at the occurrence and cleared after each communication (each time the SS signal has a positive

transition). Each bit, set to ‘1’, indicates an OVT condition for the corresponding channel.

Table 14. Command 8-bit frame (from MCU to IC)

MSB

LSB

IN7

IN6

IN5

IN4

IN3

IN2

IN1

IN0

Table 15. Fault 8-bit frame (from IC to MCU)

MSB

LSB

F7

F6

F5

F4

F3

F2

F1

F0

9.2

16-bit SPI mode (SEL1 = H)

The 16-bit SPI mode is based on a 16-bit command frame sent from the microcontroller to the IC. The first 8 bits

directly drive the output channels (each bit, set to ‘1’, activates the corresponding output), the other 8 bits contain

a 4-bit parity check code where the last bit (the inversion of the previous one) is used to detect a communication

error condition (providing at least a transition in each frame):

P0 = IN0

⊕IN1⊕IN2⊕IN3⊕IN4⊕IN5⊕IN6⊕IN7

P1 = IN1

⊕IN3⊕IN5⊕IN7

P2 = IN0

⊕IN2⊕IN4⊕IN6

nP0 = not P0

where

⊕istheXORoperatorsymbol.

Table 16. Command 16-bit frame (from MCU to IC)

MSB

LSB

IN7

IN6

IN5

IN4

IN3

IN2

IN1

IN0

P2

P1

P0

nP0

IPS8200HQ, IPS8200HQ-1

SPI operation (SEL2 = H)

DS14313 - Rev 2

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