IPS8200HQ datasheet(4/36 Pages) STMICROELECTRONICS

4 / 36 page

Pin connection

Figure 2. Pin connection (top through view)

Table 1. Pin description

Name

Type

Description

SPI mode

Parallel mode

1 to 8; 27 to 31; 35, 40

Not connected.

SEL2

Logic input

SEL2 = H.

SEL2 = GND.

SEL1/IN1

Logic input

SEL1 = L or H selects the SPI 8-bits or 16-bits

option.

IN1 = L/H drives off/on the OUT1.

WD_EN/IN2

Logic/analog input

WD_EN = H or L enables or disables the

watchdog feature.

IN2 = L/H drives off/on the OUT2.

OUT_EN/IN3

Logic input

OUT_EN = L or H forces off all OUTX or enables

the control by SPI.

IN3 = L/H drives off/on the OUT3.

WD/IN4

Logic input

WD is the watchdog input: the internal watchdog

counter is cleared on the falling edges.

IN4 = L/H drives off/on the OUT4.

SDI/IN5

Logic input

Connected to the MOSI port of the MCU.

IN5 = L/H drives off/on the OUT5.

CLK/IN6

Logic input

Serial clock/channel 6 input.

Connected to the SPI Clock port of the MCU.

IN6 = L/H drives off/on the OUT6.

SS /IN7

Logic input

Connected to the GPIO port of the MCU

controlling the SPI chip select.

IN7 = L/H drives off/on the OUT7.

SDO/IN8

Logic input/output Connected to the MISO port of the MCU.

IN8 = L/H drives off/on the OUT8.

IPS8200HQ, IPS8200HQ-1

Pin connection

DS14313 - Rev 2

page 4/36

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