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Data Sheet

AD3542R

THEORY OF OPERATION

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Rev. C | 27 of 66

PRODUCT DESCRIPTION

The AD3542R is a dual channel, 16 MUPS voltage output DAC with

programmable output ranges and a 2.5 V internal reference. This

device is available in 16-bit and 12-bit resolutions.

The AD3542R-16 has two update modes.

►

Fast mode: data written in this mode is 16 bits long, resulting in a

single-channel update rate of 16 MUPS. The DNL specification is

valid for the reduced temperature range defined in Table 2. The

data for this mode is written in the registers ending in _16B.

►

Precision mode: data written in this mode is 24 bits long, re-

sulting in a single-channel update rate of 11 MUPS. The DNL

specification is guaranteed over the full operating temperature

range. The data for this mode is written in the registers ending in

_24B.

The AD3542R-12 supports fast mode only. The _24B registers are

not accessible. 12-bit data must be written to the_16B registers,

leaving the four LSBs set to 0.

The AD3542R offers a versatile SPI interface capable of operating

in classic and dual SPI modes with single or double data rate. The

AD3542R features multiple error checkers, both in the analog and

digital domains to guarantee a safe operation.

DAC ARCHITECTURE

The AD3542R uses a current steering DAC architecture with a VREF

voltage of 2.5 V. The DAC current is converted to voltage by means

of an internal TIA.

Figure 79 shows the internal block diagram.

RFB4_x

RFB2_x

RFB1_x

VOUTx

Figure 79. DAC Channel Architecture Block Diagram

The TIA feedback loop is closed by hardwiring the VOUTx pin to any

of the available RFBx_y pins. The RFBx_y value sets the maximum

voltage span that can be achieved. The RFBx_y pin used for each

voltage range is specified in the Output Voltage Spans section.

OUTPUT VOLTAGE SPANS

The AD3542R offers five voltage spans that are selected using the

CH0_CH1_OUTPUT_RANGE register. The selected span must be

in accordance with the feedback resistor being used, as shown

in Table 8. Setting a voltage span that is not achievable with

the current RFBx_y resistor results in an incorrect voltage value.

The supply levels on PVDD and PVSS must also be adjusted to

guarantee enough headroom and footroom for each range.

There is approximately a 3% overrange equally split on each end

of the span to ensure that the nominal range is covered in any

condition.

Table 8. Output Span Ranges and Corresponding Feedback Resistor

RFBx_y

CH0_CH1_OUTPUT_RANG

Output Span

(V)

VZS (V) VFS (V)

RFB1_y

0x000

0 to 2.5

−0.197

2.701

0x001

0 to 5

−0.077

5.077

RFB2_y

0x010

0 to 10

−0.162

10.164

0x011

−5 to +5

−5.164

5.162

0x100

−2.5 to +7.5

−2.663

7.663

TRANSFER FUNCTION

The conversion of the digital code to the DAC output current follows

a linear relation with the code in plain binary. The ideal output

voltage is given by the following equation:

VOUT= VFS−VZS × D216+VZS

where:

D is the decimal equivalent of the binary code that is loaded in the

DAC register. For the AD3542R-12, D is still a 16-bit number where

the lower four bits are 0, that is, the 12-bit code multiplied by 16.

VZS and VFS are according to the values given in the Output Voltage

Spans section.

INTERNAL TIA

The internal TIA is capable of operating at 20 mV from the supply

rails, PVDD and PVSS. The supplies of the internal TIA must be

adapted to accommodate the desired output range while observing

the minimum headroom, footroom, and maximum supply voltage.

TIA POWER CONSUMPTION

The static power consumption of the internal TIA depends on

the output voltage, the feedback resistor, and the load resistance.

The following formulas approximate the current drawn by a single

amplifier on PVDD and PVSS as a function of these parameters, as

long as the amplifier is not in saturation. Current values in mA are:

IPVDD=0.65+max0, VOUT−2.5RFB+VOUTRL

IPVSS=−0.65+min0, VOUT−2.5RFB+VOUTRL

where:

VOUT is the output voltage in volts.

RFB is the value of the feedback resistor in kΩ.

RL is the load resistance in kΩ.

The first term of the equations is the quiescent current of an

individual amplifier. Amplifiers are active at power up and can be

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