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35FS6500 Datasheet(PDF) 43 Page - NXP Semiconductors

Part # 35FS6500
Description  Grade 0 safety power system basis chip with CAN FD transceiver
PDF  139 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

35FS6500 Datasheet(HTML) 43 Page - NXP Semiconductors

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NXP Semiconductors
35FS4500-35FS6500-ASILB
Grade 0 safety power system basis chip with CAN FD transceiver
aaa-037754
RSTB
FLT_ERR_CNT
DFS
Cold reset
(start-up)
# WD refresh counter max value +1
consecutive WD answers OK
FS_OUT
write OK
1
1
2
3
4
5
6
0
# 1
FS0B
RSTB
# 2
FS0B
WD error
counter
= 6
WD answer OK
WD error
counter
= 6
WD error
counter
= 6
WD error counter = 6
or
WD not OK INIT_FS
WD error counter = 6
or
WD not OK INIT_FS
WD error counter = 6
or
WD not OK INIT_FS
Figure 21. Example of RTSB and FS0B behavior when FLT_ERR_CNT ≥ intermediate value
12.5.3.2 Fault error counter at start-up or resuming from LPOFF mode
At start-up or when resuming from LPOFF mode, the fault error counter starts at level 1 and FS0B is asserted
low. To release FS0B, the fault error counter must go back to a ’0’ value due to several consecutive good
watchdog refreshes. The right command is sent to the RELEASE_FSxB register (Figure 23). With the default
watchdog refresh counter configuration (WD_RFR_CNT = 6), seven consecutive good watchdog refreshes
decrease the fault error counter to 0 (Figure 22).
RSTB
delay time
New fully OPEN
window of 256 ms
0
0
1
1
2
2
0
OK
1
1
3
4
4
5
6
6
OK
OK
OK
OK
OK
OK
OK
NOK
WD window
WD error
counter
Fault error
counter
RSTB
WD refresh
counter
aaa-037755
Figure 22. Example of WD operation leading a decrement of the fault error counter (WD_CNT_RFR = 6)
 
35FS4500-35FS6500-ASILB
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 3 — 5 August 2024
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