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M68HC08 Datasheet(PDF) 167 Page - Freescale Semiconductor, Inc |
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M68HC08 Datasheet(HTML) 167 Page - Freescale Semiconductor, Inc |
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167 / 288 page ![]() Universal Serial Bus Module (USB) MC68HC908BD48 — Rev. 2.1 Data Sheet Freescale Semiconductor Universal Serial Bus Module (USB) 167 TBEF — Transmit Buffer Empty Flag This flag is set after the data stored in endpoint 0 transmit buffer has been sent and ACK handshake packet is received. Software must clear this flag by writing a logic "1" to TBEFR bit after the data is ready in the transmit buffer. This enables the next data packet transmission when endpoint 0 transmit is enabled (TX0E = 1). TBEF generates an interrupt request to the CPU if the TBIE bit is also set. Reset clears this bit. 1 = Transmit on endpoint 0 has occurred 0 = Transmit on endpoint 0 has not occurred RBFF — Receive Buffer Full Flag This flag is set when the module has received one data packet and replied with ACK handshake packet. Software must clear this flag by writing "1" to RBFFR bit after all the received data have been read to enable the next data packet reception. RBFF generates an interrupt request to the CPU if the RBIE bit is also set. Reset clears this bit. 1 = Receive on endpoint 0 has occurred 0 = Receive on endpoint 0 has not occurred EOPIF — End Of Packet Interrupt Flag This flag is set when a valid EOP signal transition is detected on the D+ and D– lines. This flag can be cleared by writing "1" to EOPIFR bit. EOPIF generates an interrupt request to the CPU if the EOPIE bit is also set. Reset clears this bit. 1 = End-of-packet sequence has been detected 0 = End-of-packet sequence has not been detected RSTIF — Reset Interrupt Flag The flag is set when a valid reset signal state is detected on the D+ and D– lines. This flag can be cleared by writing "1" to RSTIFR bit. RSTIF generates an interrupt request to the CPU if the RSTIE bit is also set. Reset clears this bit. 1 = USB reset condition has been detected 0 = USB reset condition has not been detected |
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