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M68HC08 Datasheet(PDF) 172 Page - Freescale Semiconductor, Inc

Part # M68HC08
Description  Microcontrollers
PDF  288 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

M68HC08 Datasheet(HTML) 172 Page - Freescale Semiconductor, Inc

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Universal Serial Bus Module (USB)
Data Sheet
MC68HC908BD48 — Rev. 2.1
172
Universal Serial Bus Module (USB)
Freescale Semiconductor
RX0E — Endpoint 0 Receive Enable
This bit is set to enable data packet reception from endpoint 0.
Software should set this bit when it is ready for data packet reception.
It must be cleared when data cannot be received. If RX0E "0" or RBFF
is "1", a NAK handshake will be returned for the next OUT token.
Reset clears this bit.
1 = Data is read to be received on endpoint 0
0 = Not ready for data; respond with NAK
TP0SIZ[3:0] — Endpoint 0 Transmit Data Size
The TP0SIZ[3:0] is used to store the number of transmit data bytes
from endpoint 0. The default size of transmit data is "0" after reset.
13.5.5 USB Control Register 1 (UCR1)
T1SEQ — Endpoint 1/2 Data Packet PID Select
This bit will determine the transmit data packet PID of endpoint 1/2.
When it is "0", the DATA0 PID (b0011) will be sent. When it is "1", the
DATA1 PID (b1011) will be sent. Reset clears this bit.
1 = DATA1 PID will be sent on endpoint 1/2
0 = DATA0 PID will be sent on endpoint 1/2
ENDADD — Endpoint Address Select
This bit specifies the which endpoint (1 or 2) uses the eight data
registers, UD1R0–UD1R7, for data transmit buffers. Clearing this bit
selects endpoint 1 to use the data registers. Setting this bit selects
endpoint 2 to use the data registers.
Address:
$002F
Bit 7
654321
Bit 0
Read:
T1SEQ
ENDADD
TX1E
FRESUM TP1SIZ3 TP1SIZ2 TP1SIZ1 TP1SIZ0
Write:
Reset:
00000000
Figure 13-5. USB Control Register 1 (UCR1)



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