M68HC08 datasheet(191/288 Pages) FREESCALE

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Multi-Master IIC Interface (MMIIC)

MC68HC908BD48 — Rev. 2.1

Data Sheet

Freescale Semiconductor

Multi-Master IIC Interface (MMIIC)

191

Figure 14-7. Data Transfer Sequences for Master/Slave Transmit/Receive Modes

START

Address

ACK

TX Data1

MMTXBE=0

MMRW=0

MMAST=1

MMTXIF=1

MMTXBE=1

MMNAKIF=1

MMAST=0

MMTXBE=1

(a) Master Transmit Mode

(b) Master Receive Mode

MMTXIF=1

MMTXBE=0

ACK

TX DataN

NAK

STOP

MMTXIF=1

MMTXBE=1

START

Address

ACK

RX Data1

MMRXBF=0

MMAST=1

MMTXBE=0

MMRXBF=1

MMRXIF=1

MMNAKIF=1

MMAST=0

MMRXIF=1

MMRXBF=1

ACK

RX DataN

NAK

STOP

START

Address

ACK

TX Data1

MMTXBE=1

MMRXBF=0

MMNAKIF=1

MMTXBE=0

MMTXBE=1

(d) Slave Receive Mode

MMTXIF=1

ACK

TX DataN

NAK

STOP

MMRXBF=1

MMRXIF=1

MMATCH=1

MMSRW=1

MMTXIF=1

MMTXBE=1

START

Address

ACK

RX Data1

MMRXBF=1

MMRXIF=1

MMRXBF=1

ACK

RX DataN

NAK

STOP

MMTXBE=0

MMRXBF=0

MMRXBF=1

MMRXIF=1

MMATCH=1

MMSRW=0

Data1 → MMDRR

DataN → MMDRR

Data1 → MMDTR

Data2 → MMDTR

DataN+2 → MMDTR

Data1 → MMDTR

Data2 → MMDTR

Data3 → MMDTR

DataN+2 → MMDTR

(dummy data → MMDTR)

MMRW=1

Data1 → MMDRR

DataN → MMDRR

KEY: shaded data packets indicate a transmit by the MCU’s MMIIC module

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