TDA9321 datasheet(19/44 Pages) PHILIPS

19 / 44 page

1998 Dec 16

Philips Semiconductors

Preliminary speciﬁcation

I2C-bus controlled TV input processor

TDA9321H

Isource(max)

maximum source current

−−

5mA

Bv(−3dB)

−3 dB bandwidth of

demodulated output signal

MHz

Gdif

differential gain

note 9

−−

1.5

dif

differential phase

notes 6 and 9

−−

2.5

deg

NLvid

video non-linearity

note 10

−

2.5

Vclamp

white spot clamping level

−

6.0

−

Nclamp

noise inverter clamping level

note 11

−

1.5

−

Nins

noise inverter insertion level

(identical to black level)

note 11

−

2.7

−

dblue

intermodulation at ‘blue’

notes 6 and 12

f = 0.92 or 1.1 MHz

−

f = 2.66 or 3.3 MHz

−

dyellow

intermodulation at ‘yellow’

notes 6 and 12

f = 0.92 or 1.1 MHz

−

f = 2.66 or 3.3 MHz

−

S/NW

weighted signal-to-noise ratio

notes 6 and 13

S/NUW

unweighted signal-to-noise ratio notes 6 and 13

−

∆V

residual carrier signal

note 6

−

5.5

−

∆V

rc(2H)

2nd harmonic of residual carrier

signal

note 6

−

2.5

−

PSRR

power supply ripple rejection

at the output

−

VIF AND TUNER AGC; note 14

Timing of VIF-AGC with a 2.2

µF capacitor (pin DECVIF)

MVI

modulated video interference

60% AM for 1 to 100 mV;

0 to 200 Hz; system B/G

−−

tres

response time

VIF input signal

amplitude increase of

52 dB; positive and

negative modulation

−

VIF input signal

amplitude decrease of

52 dB

negative modulation

−

positive modulation

−

100

−

leakage current of the capacitor

on pin 4

negative modulation

−−

µA

positive modulation

−−

200

∆Vo(v)

change in video output signal

amplitude over 1 vertical period

for peak white AGC at positive

modulation

capacitor on pin 4 is

0.5

µF

−−

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

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