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TDA9321 Datasheet(PDF) 26 Page - NXP Semiconductors

Part # TDA9321
Description  I2C-bus controlled TV input processor
PDF  44 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA9321 Datasheet(HTML) 26 Page - NXP Semiconductors

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1998 Dec 16
26
Philips Semiconductors
Preliminary specification
I2C-bus controlled TV input processor
TDA9321H
SECAM demodulator
fblos
black level offset frequency
−−
7
kHz
fblos/T
black level offset frequency
variation with temperature
−−
60
Hz/K
fp
pole frequency of de-emphasis
77
85
93
kHz
fp/fz
ratio pole and zero frequency
3
NL
non-linearity
−−
3%
Vcal
calibration voltage
3
4
5
V
Baseband delay line
∆Vo
variation of output signal
for adjacent time samples
at constant input signals
−0.1
0.1
dB
∆V
r(clk)(p-p)
residual clock signal
(peak-to-peak value)
−−
5mV
td
delay
delayed signal
63.94
64.0
64.06
µs
non-delayed signal
40
60
80
ns
∆V
o
difference in output amplitude
when delay line is
bypassed or not (with
bit BPS)
−−
5%
PALplus helper demodulator
Vo(helper)(p-p)
helper output voltage
(peak-to-peak value)
610
686
770
mV
Vsu(helper)
helper set-up amplitude
only helper
lines 22 and 23
380
400
420
mV
td(g)
group delay
within pass band
−−
10
ns
ϕ
e(dem)
demodulation phase error
including H/2 phase error
−−
5
deg
α
sup
suppression
for modulated helper in
demodulated 0 to 1 MHz
signal
−36
−−
dB
∆V
r
residual signal
at 4.43 MHz signal
−36
−−
dB
THD
total harmonic distortion
in ACC
−36
−−
dB
to(helper-Y)
helper output timing to Y output
−−
10
ns
Voffset
offset voltage
for demodulated mid grey
to inserted mid grey level;
mid grey line 23 to line 22
−−
5mV
tW(su)(helper)
helper set-up pulse width
52.8
−µs
td
delay between mid sync of input
and start of helper set-up
bits YD3 to YD0 = 1011;
note 30
8.6
−µs
delay between start of black
set-up and start of helper set-up
only lines 22 and 23
30.8
−µs
Bhelper(−3dB)
−3 dB bandwidth of helper
baseband
2.6
MHz
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT



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